diff options
Diffstat (limited to 'soc/mediatek/mt8186/README.md')
-rw-r--r-- | soc/mediatek/mt8186/README.md | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/soc/mediatek/mt8186/README.md b/soc/mediatek/mt8186/README.md index eb7a848..e5e497a 100644 --- a/soc/mediatek/mt8186/README.md +++ b/soc/mediatek/mt8186/README.md @@ -29,7 +29,7 @@ application processor for security reason. SSPM firmware is loaded into SSPM SRAM at system initialization. ## Who uses it -Coreboot will load sspm.bin to SSPM SRAM at ramstage. +coreboot will load sspm.bin to SSPM SRAM at ramstage. ## How to load `sspm.bin` Use CBFS to load `sspm.bin`. @@ -49,11 +49,11 @@ The caller may store the parameters on NOR/NAND or eMMC for faster subsequent bootups. ## Who uses it -Coreboot loads `dram.elf` during the first bootup if no valid DRAM parameters +coreboot loads `dram.elf` during the first bootup if no valid DRAM parameters are found on NOR/NAND or eMMC. ## How to load `dram.elf` -Coreboot locates `dram.elf` file, locates the entry point `_start`, +coreboot locates `dram.elf` file, locates the entry point `_start`, passes a `dramc_param` struct argument `dparam` to it, and calls `_start(&dparam)` to execute `dram.elf`. @@ -130,7 +130,7 @@ struct dramc_data { ## The output of `dram.elf` `dram.elf` configures suitable dramc settings and returns the DRAM parameters. -Then, Coreboot saves the parameters on the specified firmware flash section: +Then, coreboot saves the parameters on the specified firmware flash section: `"RW_MRC_CACHE"`. ## Return values |