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path: root/plat/arm/board/n1sdp
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* fix(spmd): fix build error with spmdGovindraj Raja2023-05-101-2/+2
* feat(spmd): introduce platform handler for Group0 interruptMadhukar Pappireddy2023-05-011-0/+11
* fix(gicv3): workaround for NVIDIA erratum T241-FABRIC-4Varun Wadekar2023-03-231-2/+2
* refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3Arvind Ram Prakash2023-03-151-2/+2
* fix(scmi): change function prototype to fix gcc errorTony K Nadackal2022-12-081-1/+1
* fix(n1sdp): mapping Run-time UART to IOFPGA UART0Himanshu Sharma2022-09-011-2/+3
* (feat)n1sdp: add support for OP-TEE SPMCVishnu Banavath2022-07-254-4/+49
* feat(n1sdp): add support for nt_fw_configsahil2022-05-126-13/+179
* feat(n1sdp): enable trusted board boot on n1sdpsah012022-05-1211-111/+410
* Add support for Neoverse-N2 CPUs.Javier Almansa Sobrino2020-11-301-1/+1
* n1sdp: remote chip SPI numbering for multichip GIC routingSayanta Pattanayak2020-08-241-2/+2
* fdts: n1sdp: DTS file for single-chip and multi-chip environment.Andre Przywara2020-07-301-0/+2
* GICv3: GIC-600: Detect GIC-600 at runtimeAndre Przywara2020-06-091-1/+1
* TF-A GICv3 driver: Introduce makefileAlexei Fedorov2020-03-301-7/+7
* Merge "n1sdp: Enable the NEOVERSE_N1_EXTERNAL_LLC flag" into integrationManish Pandey2020-03-121-0/+3
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| * n1sdp: Enable the NEOVERSE_N1_EXTERNAL_LLC flagChandni Cherukuri2020-03-111-0/+3
* | TF-A GICv3 driver: Separate GICD and GICR accessor functionsAlexei Fedorov2020-03-101-1/+3
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* drivers/arm/scmi: allow use of multiple SCMI channelsAditya Angadi2020-02-072-2/+5
* drivers/mhu: derive doorbell base addressAditya Angadi2020-02-071-2/+1
* GIC-600: Fix include ordering according to the coding styleMax Shvetsov2019-11-191-1/+1
* n1sdp: setup multichip gic routing tableManish Pandey2019-11-112-2/+34
* n1sdp: update platform macros for dual-chip setupManish Pandey2019-10-316-41/+132
* n1sdp: introduce platform information SDS regionManish Pandey2019-10-302-29/+48
* Switch AARCH32/AARCH64 to __aarch64__Julius Werner2019-08-011-1/+1
* n1sdp: fix DMC ECC enablement sequence in N1SDP platformManoj Kumar2019-07-232-0/+17
* n1sdp: add code for DDR ECC enablement and BL33 copy to DDRManoj Kumar2019-06-265-6/+189
* N1SDP: Fix DRAM2 start addressSami Mujawar2019-05-151-1/+2
* plat/arm: introduce wrapper functions to setup secure watchdogAditya Angadi2019-04-173-0/+15
* plat/arm: mhu: make mhu driver genericMasahisa Kojima2019-03-131-0/+1
* Merge pull request #1835 from jts-arm/renameAntonio Niño Díaz2019-02-222-9/+9
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| * Rename Cortex-Ares to Neoverse N1John Tsichritzis2019-02-192-9/+9
* | Rename PLAT_ARM_BL31_RUN_UART* variableUsama Arif2019-02-181-4/+4
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* plat/arm: mhu: Move to drivers/ folderAntonio Nino Diaz2019-01-251-2/+1
* plat/arm: scmi: Move to drivers/ folderAntonio Nino Diaz2019-01-251-1/+1
* plat/arm: Sanitise includesAntonio Nino Diaz2019-01-254-7/+7
* plat/arm: Fix header dependenciesAntonio Nino Diaz2019-01-152-1/+1
* plat/arm/n1sdp: define the uart constants for N1SDPDeepak Pandey2019-01-073-4/+16
* Sanitise includes across codebaseAntonio Nino Diaz2019-01-042-5/+8
* Merge pull request #1699 from chandnich/sgi-mt-supportSoby Mathew2018-12-031-0/+2
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| * plat/css: allow platforms to define the system power domain levelChandni Cherukuri2018-11-271-0/+2
* | plat/arm: remove weak implemention of 'plat_arm_psci_override_pm_ops' functionChandni Cherukuri2018-11-291-0/+6
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* Standardise header guards across codebaseAntonio Nino Diaz2018-11-082-6/+8
* plat/arm: Introduce the N1SDP.Deepak Pandey2018-10-299-0/+382