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path: root/drivers/arm/gic
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* fix(gic): wrap cache enabled assert under plat_can_cmoChannagoud kadabi2022-12-121-2/+5
* fix(gicv3/multichip): fix overflow caused by left shiftVijayenthiran Subramaniam2022-10-111-2/+3
* refactor(libc): clean up dependencies in libcClaus Pedersen2022-09-222-0/+3
* Merge changes from topic "provencore-spd" into integrationJoanna Farley2022-09-162-5/+22
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| * feat(gic): add APIs to raise NS and S-EL1 SGIsFlorian Lugou2022-09-142-5/+22
* | feat(gicv3): validate multichip data for GIC-700Varun Wadekar2022-07-292-5/+117
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* fix(gic600): implement workaround to forward highest priority interruptManish V Badarkhe2022-06-154-6/+111
* feat(gic600ae_fmu): enable all GICD, PPI, ITS SMsVarun Wadekar2022-04-071-6/+12
* feat(gic600ae_fmu): disable SMID for unavailable blocksVarun Wadekar2022-04-072-2/+50
* feat(gic600ae_fmu): introduce support for RAS error handlingVarun Wadekar2022-04-061-1/+131
* fix(gicv3): fix iroute value wrong issueMing Huang2021-12-061-1/+1
* fix(drivers/gic600ae_fmu): fix timeout calculationanzhou2021-11-181-2/+5
* feat(gicv3): introduce GIC component identificationAndre Przywara2021-11-041-0/+15
* fix: remove "experimental" tag for stable featuresManish Pandey2021-10-221-4/+0
* Merge changes from topic "gic-700-auto" into integrationAndré Przywara2021-09-105-35/+44
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| * feat(gicv3): detect GICv4 feature at runtimeAndre Przywara2021-09-012-13/+8
| * feat(gicv3): multichip: detect GIC-700 at runtimeAndre Przywara2021-09-012-16/+32
| * refactor(gic): move GIC IIDR numbersAndre Przywara2021-09-011-3/+1
| * refactor(gicv3): rename GIC Clayton to GIC-700Andre Przywara2021-08-202-6/+6
* | feat(gic600ae): introduce support for Fault Management UnitVarun Wadekar2021-09-013-0/+512
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* fix(gicv3): add dsb in both disable and enable function of gicv3_cpuifMing Huang2021-07-231-0/+4
* refactor(gicv3): use helper functions to get SPI/ESPI INTID limitHeyi Guo2021-06-162-71/+8
* refactor(gicv3): add helper function to get the limit of ESPI INTIDHeyi Guo2021-06-162-0/+23
* refactor(gicv3): add helper function to get the limit of SPI INTIDHeyi Guo2021-06-082-0/+20
* drivers/gicv3: also shift eSPI register offset in GICD_OFFSET_64()Heyi Guo2021-02-031-2/+3
* drivers/gicv3: add debug log for maximum INTID of SPI and eSPIHeyi Guo2021-02-031-0/+3
* drivers/gicv3: limit SPI ID to avoid misjudgement in GICD_OFFSET()Heyi Guo2021-02-031-0/+9
* drivers/gicv3: fix logical issue for num_eintsHeyi Guo2021-02-032-4/+4
* drivers/gicv3: fix potential GICD context override with ESPI enabledHeyi Guo2021-02-031-2/+4
* drivers/gicv3: use mpidr to probe GICR for current CPUHeyi Guo2021-02-031-6/+6
* Fix casting bug in gicv2_main.cjohpow012020-10-101-7/+9
* drivers: arm: gicv3: Allow detecting number of coresAndre Przywara2020-09-291-0/+30
* GIC-600: Fix MISRA-2012 defectsAlexei Fedorov2020-07-291-20/+23
* Merge "gicv3: Do power management on Arm GIC-Clayton as well" into integrationManish Pandey2020-07-211-5/+11
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| * gicv3: Do power management on Arm GIC-Clayton as wellAndre Przywara2020-07-211-5/+11
* | TF-A GICv2 driver: Introduce makefileAlexei Fedorov2020-07-203-1/+358
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* drivers: arm: gicv3: auto-detect presence of GIC600-AEVarun Wadekar2020-07-071-13/+16
* TF-A GIC driver: Add barrier before eoiSandeep Tripathy2020-06-221-0/+9
* GICv3: GIC-600: Detect GIC-600 at runtimeAndre Przywara2020-06-093-56/+51
* Merge "TF-A GICv3 driver: Change API for GICR_IPRIORITYR accessors" into inte...v2.3-rc0joanna.farley2020-04-073-7/+144
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| * TF-A GICv3 driver: Change API for GICR_IPRIORITYR accessorsAlexei Fedorov2020-04-073-7/+144
* | gic multichip: add support for claytonVijayenthiran Subramaniam2020-04-071-2/+12
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* TF-A: Add GICv4 extension for GIC driverAlexei Fedorov2020-04-072-6/+18
* TF-A GICv3 driver: Add extended PPI and SPI rangeAlexei Fedorov2020-04-066-480/+943
* TF-A GICv3 driver: Introduce makefileAlexei Fedorov2020-03-301-0/+34
* TF-A GICv3 driver: Separate GICD and GICR accessor functionsAlexei Fedorov2020-03-104-284/+396
* Coverity: remove unnecessary header file includesZelalem2020-02-041-2/+1
* Use correct type when reading SCR registerLouis Mayencourt2020-01-281-3/+3
* GIC-600: Fix include ordering according to the coding styleMax Shvetsov2019-11-191-3/+3
* GIC-600: Fix power up sequenceAlexei Fedorov2019-11-151-26/+39