diff options
Diffstat (limited to 'plat/nvidia/tegra/soc')
-rw-r--r-- | plat/nvidia/tegra/soc/t194/plat_ras.c | 2 | ||||
-rw-r--r-- | plat/nvidia/tegra/soc/t194/plat_setup.c | 2 | ||||
-rw-r--r-- | plat/nvidia/tegra/soc/t194/plat_sip_calls.c | 2 | ||||
-rw-r--r-- | plat/nvidia/tegra/soc/t194/platform_t194.mk | 5 |
4 files changed, 6 insertions, 5 deletions
diff --git a/plat/nvidia/tegra/soc/t194/plat_ras.c b/plat/nvidia/tegra/soc/t194/plat_ras.c index a9fed0ac7..248f16392 100644 --- a/plat/nvidia/tegra/soc/t194/plat_ras.c +++ b/plat/nvidia/tegra/soc/t194/plat_ras.c @@ -484,7 +484,7 @@ REGISTER_RAS_INTERRUPTS(carmel_ras_interrupts); void plat_ea_handler(unsigned int ea_reason, uint64_t syndrome, void *cookie, void *handle, uint64_t flags) { -#if RAS_EXTENSION +#if RAS_FFH_SUPPORT tegra194_ea_handler(ea_reason, syndrome, cookie, handle, flags); #else plat_default_ea_handler(ea_reason, syndrome, cookie, handle, flags); diff --git a/plat/nvidia/tegra/soc/t194/plat_setup.c b/plat/nvidia/tegra/soc/t194/plat_setup.c index 8f7d1e9a1..d3d09d3dc 100644 --- a/plat/nvidia/tegra/soc/t194/plat_setup.c +++ b/plat/nvidia/tegra/soc/t194/plat_setup.c @@ -254,7 +254,7 @@ void plat_early_platform_setup(void) /* sanity check MCE firmware compatibility */ mce_verify_firmware_version(); -#if RAS_EXTENSION +#if RAS_FFH_SUPPORT /* Enable Uncorrectable RAS error */ tegra194_ras_enable(); #endif diff --git a/plat/nvidia/tegra/soc/t194/plat_sip_calls.c b/plat/nvidia/tegra/soc/t194/plat_sip_calls.c index 1eef55912..f0704edb1 100644 --- a/plat/nvidia/tegra/soc/t194/plat_sip_calls.c +++ b/plat/nvidia/tegra/soc/t194/plat_sip_calls.c @@ -71,7 +71,7 @@ int32_t plat_sip_handler(uint32_t smc_fid, break; -#if RAS_EXTENSION +#if RAS_FFH_SUPPORT case TEGRA_SIP_CLEAR_RAS_CORRECTED_ERRORS: { /* diff --git a/plat/nvidia/tegra/soc/t194/platform_t194.mk b/plat/nvidia/tegra/soc/t194/platform_t194.mk index 631c92691..a183d0e9d 100644 --- a/plat/nvidia/tegra/soc/t194/platform_t194.mk +++ b/plat/nvidia/tegra/soc/t194/platform_t194.mk @@ -34,7 +34,8 @@ $(eval $(call add_define,MAX_MMAP_REGIONS)) # enable RAS handling HANDLE_EA_EL3_FIRST_NS := 1 -RAS_EXTENSION := 1 +ENABLE_FEAT_RAS := 1 +RAS_FFH_SUPPORT := 1 # platform files PLAT_INCLUDES += -Iplat/nvidia/tegra/include/t194 \ @@ -68,7 +69,7 @@ BL31_SOURCES += ${TEGRA_DRIVERS}/spe/shared_console.S endif # RAS sources -ifeq (${RAS_EXTENSION},1) +ifeq (${RAS_FFH_SUPPORT},1) BL31_SOURCES += lib/extensions/ras/std_err_record.c \ lib/extensions/ras/ras_common.c \ ${SOC_DIR}/plat_ras.c |