diff options
| -rw-r--r-- | plat/nvidia/tegra/common/aarch64/tegra_helpers.S | 45 | ||||
| -rw-r--r-- | plat/nvidia/tegra/common/drivers/spe/shared_console.S | 113 | ||||
| -rw-r--r-- | plat/nvidia/tegra/common/tegra_bl31_setup.c | 18 | ||||
| -rw-r--r-- | plat/nvidia/tegra/common/tegra_common.mk | 4 | ||||
| -rw-r--r-- | plat/nvidia/tegra/common/tegra_pm.c | 21 | ||||
| -rw-r--r-- | plat/nvidia/tegra/include/tegra_private.h | 3 |
6 files changed, 95 insertions, 109 deletions
diff --git a/plat/nvidia/tegra/common/aarch64/tegra_helpers.S b/plat/nvidia/tegra/common/aarch64/tegra_helpers.S index b47be6dc4..13ca6aaa2 100644 --- a/plat/nvidia/tegra/common/aarch64/tegra_helpers.S +++ b/plat/nvidia/tegra/common/aarch64/tegra_helpers.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -218,49 +218,6 @@ func platform_mem_init ret endfunc platform_mem_init - /* --------------------------------------------- - * int plat_crash_console_init(void) - * Function to initialize the crash console - * without a C Runtime to print crash report. - * Clobber list : x0 - x4 - * --------------------------------------------- - */ -func plat_crash_console_init - mov x0, #0 - adr x1, tegra_console_base - ldr x1, [x1] - cbz x1, 1f - mov w0, #1 -1: ret -endfunc plat_crash_console_init - - /* --------------------------------------------- - * int plat_crash_console_putc(void) - * Function to print a character on the crash - * console without a C Runtime. - * Clobber list : x1, x2 - * --------------------------------------------- - */ -func plat_crash_console_putc - adr x1, tegra_console_base - ldr x1, [x1] - b console_core_putc -endfunc plat_crash_console_putc - - /* --------------------------------------------- - * int plat_crash_console_flush() - * Function to force a write of all buffered - * data that hasn't been output. - * Out : return -1 on error else return 0. - * Clobber list : x0, x1 - * --------------------------------------------- - */ -func plat_crash_console_flush - adr x0, tegra_console_base - ldr x0, [x0] - b console_core_flush -endfunc plat_crash_console_flush - /* --------------------------------------------------- * Function to handle a platform reset and store * input parameters passed by BL2. diff --git a/plat/nvidia/tegra/common/drivers/spe/shared_console.S b/plat/nvidia/tegra/common/drivers/spe/shared_console.S index c1fbc842f..a3e110ec9 100644 --- a/plat/nvidia/tegra/common/drivers/spe/shared_console.S +++ b/plat/nvidia/tegra/common/drivers/spe/shared_console.S @@ -1,9 +1,10 @@ /* - * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ #include <asm_macros.S> +#include <console_macros.S> #define CONSOLE_NUM_BYTES_SHIFT 24 #define CONSOLE_FLUSH_DATA_TO_PORT (1 << 26) @@ -20,37 +21,43 @@ * finally displays everything on the UART port. */ - .globl console_core_init - .globl console_core_putc - .globl console_core_getc - .globl console_core_flush - - /* ----------------------------------------------- - * int console_core_init(uintptr_t base_addr, - * unsigned int uart_clk, unsigned int baud_rate) - * Function to initialize the console without a - * C Runtime to print debug information. This - * function will be accessed by console_init and - * crash reporting. - * In: x0 - console base address - * w1 - Uart clock in Hz + .globl console_spe_core_init + .globl console_spe_core_putc + .globl console_spe_core_getc + .globl console_spe_core_flush + .globl console_spe_putc + .globl console_spe_getc + .globl console_spe_flush + .globl console_spe_register + + /* ------------------------------------------------- + * int console_spe_register(uintptr_t baseaddr, + * uint32_t clock, uint32_t baud, + * console_spe_t *console); + * Function to initialize and register a new spe + * console. Storage passed in for the console struct + * *must* be persistent (i.e. not from the stack). + * In: x0 - UART register base address + * w1 - UART clock in Hz * w2 - Baud rate - * Out: return 1 on success else 0 on error - * Clobber list : x1, x2 - * ----------------------------------------------- + * x3 - pointer to empty console_spe_t struct + * Out: return 1 on success, 0 on error + * Clobber list : x0, x1, x2, x6, x7, x14 + * ------------------------------------------------- */ -func console_core_init - /* Check the input base address */ - cbz x0, core_init_fail - mov w0, #1 - ret -core_init_fail: +func console_spe_register + cbz x3, register_fail + str x0, [x3, #CONSOLE_T_DRVDATA] + mov x0, x3 + finish_console_register spe putc=1, getc=1, flush=1 + +register_fail: mov w0, wzr ret -endfunc console_core_init +endfunc console_spe_register /* -------------------------------------------------------- - * int console_core_putc(int c, uintptr_t base_addr) + * int console_spe_core_putc(int c, uintptr_t base_addr) * Function to output a character over the console. It * returns the character printed on success or -1 on error. * In : w0 - character to be printed @@ -59,7 +66,7 @@ endfunc console_core_init * Clobber list : x2 * -------------------------------------------------------- */ -func console_core_putc +func console_spe_core_putc /* Check the input parameter */ cbz x1, putc_error @@ -95,32 +102,48 @@ func console_core_putc putc_error: mov w0, #-1 ret -endfunc console_core_putc +endfunc console_spe_core_putc + + /* -------------------------------------------------------- + * int console_spe_putc(int c, console_spe_t *console) + * Function to output a character over the console. It + * returns the character printed on success or -1 on error. + * In : w0 - character to be printed + * x1 - pointer to console_t structure + * Out : return -1 on error else return character. + * Clobber list : x2 + * -------------------------------------------------------- + */ +func console_spe_putc + ldr x1, [x1, #CONSOLE_T_DRVDATA] + b console_spe_core_putc +endfunc console_spe_putc /* --------------------------------------------- - * int console_core_getc(uintptr_t base_addr) + * int console_spe_getc(console_spe_t *console) * Function to get a character from the console. * It returns the character grabbed on success - * or -1 on error. - * In : x0 - console base address + * or -1 if no character is available. + * In : x0 - pointer to console_t structure + * Out: w0 - character if available, else -1 * Clobber list : x0, x1 * --------------------------------------------- */ -func console_core_getc +func console_spe_getc mov w0, #-1 ret -endfunc console_core_getc +endfunc console_spe_getc - /* --------------------------------------------- - * int console_core_flush(uintptr_t base_addr) + /* ------------------------------------------------- + * int console_spe_core_flush(uintptr_t base_addr) * Function to force a write of all buffered * data that hasn't been output. * In : x0 - console base address * Out : return -1 on error else return 0. * Clobber list : x0, x1 - * --------------------------------------------- + * ------------------------------------------------- */ -func console_core_flush +func console_spe_core_flush cbz x0, flush_error /* flush console */ @@ -131,4 +154,18 @@ func console_core_flush flush_error: mov w0, #-1 ret -endfunc console_core_flush +endfunc console_spe_core_flush + + /* --------------------------------------------- + * int console_spe_flush(console_spe_t *console) + * Function to force a write of all buffered + * data that hasn't been output. + * In : x0 - pointer to console_t structure + * Out : return -1 on error else return 0. + * Clobber list : x0, x1 + * --------------------------------------------- + */ +func console_spe_flush + ldr x0, [x0, #CONSOLE_T_DRVDATA] + b console_spe_core_flush +endfunc console_spe_flush diff --git a/plat/nvidia/tegra/common/tegra_bl31_setup.c b/plat/nvidia/tegra/common/tegra_bl31_setup.c index a9d037f19..f89e77a34 100644 --- a/plat/nvidia/tegra/common/tegra_bl31_setup.c +++ b/plat/nvidia/tegra/common/tegra_bl31_setup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -49,7 +49,6 @@ IMPORT_SYM(uint64_t, __TEXT_START__, TEXT_START); IMPORT_SYM(uint64_t, __TEXT_END__, TEXT_END); extern uint64_t tegra_bl31_phys_base; -extern uint64_t tegra_console_base; static entry_point_info_t bl33_image_ep_info, bl32_image_ep_info; static plat_params_from_bl2_t plat_bl31_params_from_bl2 = { @@ -130,9 +129,10 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, struct tegra_bl31_params *arg_from_bl2 = (struct tegra_bl31_params *) arg0; plat_params_from_bl2_t *plat_params = (plat_params_from_bl2_t *)arg1; image_info_t bl32_img_info = { {0} }; - uint64_t tzdram_start, tzdram_end, bl32_start, bl32_end; + uint64_t tzdram_start, tzdram_end, bl32_start, bl32_end, console_base; uint32_t console_clock; int32_t ret; + static console_16550_t console; /* * For RESET_TO_BL31 systems, BL31 is the first bootloader to run so @@ -194,14 +194,18 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, * Get the base address of the UART controller to be used for the * console */ - tegra_console_base = plat_get_console_from_id(plat_params->uart_id); + console_base = plat_get_console_from_id(plat_params->uart_id); - if (tegra_console_base != 0U) { + if (console_base != 0U) { /* * Configure the UART port to be used as the console */ - (void)console_init(tegra_console_base, console_clock, - TEGRA_CONSOLE_BAUDRATE); + (void)console_16550_register(console_base, + console_clock, + TEGRA_CONSOLE_BAUDRATE, + &console); + console_set_scope(&console.console, CONSOLE_FLAG_BOOT | + CONSOLE_FLAG_RUNTIME | CONSOLE_FLAG_CRASH); } /* diff --git a/plat/nvidia/tegra/common/tegra_common.mk b/plat/nvidia/tegra/common/tegra_common.mk index 2a2f2782d..34b5638ec 100644 --- a/plat/nvidia/tegra/common/tegra_common.mk +++ b/plat/nvidia/tegra/common/tegra_common.mk @@ -20,9 +20,9 @@ TEGRA_GICv2_SOURCES := drivers/arm/gic/common/gic_common.c \ plat/common/plat_gicv2.c \ ${COMMON_DIR}/tegra_gicv2.c -BL31_SOURCES += drivers/console/aarch64/console.S \ - drivers/delay_timer/delay_timer.c \ +BL31_SOURCES += drivers/delay_timer/delay_timer.c \ drivers/io/io_storage.c \ + plat/common/aarch64/crash_console_helpers.S \ ${TEGRA_GICv2_SOURCES} \ ${COMMON_DIR}/aarch64/tegra_helpers.S \ ${COMMON_DIR}/drivers/pmc/pmc.c \ diff --git a/plat/nvidia/tegra/common/tegra_pm.c b/plat/nvidia/tegra/common/tegra_pm.c index e06a116e4..8ba02d6f5 100644 --- a/plat/nvidia/tegra/common/tegra_pm.c +++ b/plat/nvidia/tegra/common/tegra_pm.c @@ -26,7 +26,6 @@ extern uint64_t tegra_bl31_phys_base; extern uint64_t tegra_sec_entry_point; -extern uint64_t tegra_console_base; /* * tegra_fake_system_suspend acts as a boolean var controlling whether @@ -219,7 +218,8 @@ void tegra_pwr_domain_suspend(const psci_power_state_t *target_state) /* Disable console if we are entering deep sleep. */ if (target_state->pwr_domain_state[PLAT_MAX_PWR_LVL] == PSTATE_ID_SOC_POWERDN) { - (void)console_uninit(); + (void)console_flush(); + console_switch_state(0); } /* disable GICC */ @@ -269,7 +269,6 @@ __dead2 void tegra_pwr_domain_power_down_wfi(const psci_power_state_t void tegra_pwr_domain_on_finish(const psci_power_state_t *target_state) { const plat_params_from_bl2_t *plat_params; - uint32_t console_clock; /* * Initialize the GIC cpu and distributor interfaces @@ -282,20 +281,8 @@ void tegra_pwr_domain_on_finish(const psci_power_state_t *target_state) if (target_state->pwr_domain_state[PLAT_MAX_PWR_LVL] == PSTATE_ID_SOC_POWERDN) { - /* - * Reference clock used by the FPGAs is a lot slower. - */ - if (tegra_platform_is_fpga()) { - console_clock = TEGRA_BOOT_UART_CLK_13_MHZ; - } else { - console_clock = TEGRA_BOOT_UART_CLK_408_MHZ; - } - - /* Initialize the runtime console */ - if (tegra_console_base != 0ULL) { - (void)console_init(tegra_console_base, console_clock, - TEGRA_CONSOLE_BAUDRATE); - } + /* Restart console output. */ + console_switch_state(CONSOLE_FLAG_RUNTIME); /* * Restore Memory Controller settings as it loses state diff --git a/plat/nvidia/tegra/include/tegra_private.h b/plat/nvidia/tegra/include/tegra_private.h index cdd9e08c1..34a096cfb 100644 --- a/plat/nvidia/tegra/include/tegra_private.h +++ b/plat/nvidia/tegra/include/tegra_private.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -11,6 +11,7 @@ #include <arch.h> #include <arch_helpers.h> +#include <drivers/ti/uart/uart_16550.h> #include <lib/psci/psci.h> #include <lib/xlat_tables/xlat_tables_v2.h> |