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| author | Piotr Szczepanik <piter75@gmail.com> | 2019-12-10 20:55:00 +0000 |
|---|---|---|
| committer | Piotr Szczepanik <piter75@gmail.com> | 2019-12-10 20:55:00 +0000 |
| commit | b4899041e5f0b8e8b388c6511b5233516b8785ec (patch) | |
| tree | 059045ec6df82f978fb47f980944551364ade184 /plat/rockchip/rk3399/drivers | |
| parent | 87b582ef5b31c5893a470b61c217931fc7602da3 (diff) | |
| download | arm-trusted-firmware-b4899041e5f0b8e8b388c6511b5233516b8785ec.tar.gz | |
plat/rockchip: enable power domains of rk3399 before reset
This patch fixes hangs that happen after soft resetting of rk3399.
Signed-off-by: Piotr Szczepanik <piter75@gmail.com>
Change-Id: If41b12ba1dfcb2ba937361b58eafd50bf5c483d4
Diffstat (limited to 'plat/rockchip/rk3399/drivers')
| -rw-r--r-- | plat/rockchip/rk3399/drivers/pmu/pmu.c | 19 | ||||
| -rw-r--r-- | plat/rockchip/rk3399/drivers/pmu/pmu.h | 1 | ||||
| -rw-r--r-- | plat/rockchip/rk3399/drivers/soc/soc.c | 2 |
3 files changed, 22 insertions, 0 deletions
diff --git a/plat/rockchip/rk3399/drivers/pmu/pmu.c b/plat/rockchip/rk3399/drivers/pmu/pmu.c index 30941fd07..faee6787d 100644 --- a/plat/rockchip/rk3399/drivers/pmu/pmu.c +++ b/plat/rockchip/rk3399/drivers/pmu/pmu.c @@ -400,6 +400,25 @@ static void pmu_power_domains_resume(void) clk_gate_con_restore(); } +void pmu_power_domains_on(void) +{ + clk_gate_con_disable(); + pmu_set_power_domain(PD_VDU, pmu_pd_on); + pmu_set_power_domain(PD_VCODEC, pmu_pd_on); + pmu_set_power_domain(PD_RGA, pmu_pd_on); + pmu_set_power_domain(PD_IEP, pmu_pd_on); + pmu_set_power_domain(PD_EDP, pmu_pd_on); + pmu_set_power_domain(PD_GMAC, pmu_pd_on); + pmu_set_power_domain(PD_SDIOAUDIO, pmu_pd_on); + pmu_set_power_domain(PD_HDCP, pmu_pd_on); + pmu_set_power_domain(PD_ISP1, pmu_pd_on); + pmu_set_power_domain(PD_ISP0, pmu_pd_on); + pmu_set_power_domain(PD_VO, pmu_pd_on); + pmu_set_power_domain(PD_TCPD1, pmu_pd_on); + pmu_set_power_domain(PD_TCPD0, pmu_pd_on); + pmu_set_power_domain(PD_GPU, pmu_pd_on); +} + void rk3399_flush_l2_b(void) { uint32_t wait_cnt = 0; diff --git a/plat/rockchip/rk3399/drivers/pmu/pmu.h b/plat/rockchip/rk3399/drivers/pmu/pmu.h index 74db82ff2..bb7de5091 100644 --- a/plat/rockchip/rk3399/drivers/pmu/pmu.h +++ b/plat/rockchip/rk3399/drivers/pmu/pmu.h @@ -136,5 +136,6 @@ struct pmu_slpdata_s { extern uint32_t clst_warmboot_data[PLATFORM_CLUSTER_COUNT]; extern void sram_func_set_ddrctl_pll(uint32_t pll_src); +void pmu_power_domains_on(void); #endif /* PMU_H */ diff --git a/plat/rockchip/rk3399/drivers/soc/soc.c b/plat/rockchip/rk3399/drivers/soc/soc.c index c877dbde8..98b5ad646 100644 --- a/plat/rockchip/rk3399/drivers/soc/soc.c +++ b/plat/rockchip/rk3399/drivers/soc/soc.c @@ -17,6 +17,7 @@ #include <dram.h> #include <m0_ctl.h> #include <plat_private.h> +#include <pmu.h> #include <rk3399_def.h> #include <secure.h> #include <soc.h> @@ -327,6 +328,7 @@ void soc_global_soft_reset_init(void) void __dead2 soc_global_soft_reset(void) { + pmu_power_domains_on(); set_pll_slow_mode(VPLL_ID); set_pll_slow_mode(NPLL_ID); set_pll_slow_mode(GPLL_ID); |