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| author | Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> | 2021-07-12 19:19:39 +0900 |
|---|---|---|
| committer | Marek Vasut <marek.vasut+renesas@gmail.com> | 2021-09-12 01:13:48 +0200 |
| commit | 14f0a0817297905c03ddf2c4c6040482ef71d744 (patch) | |
| tree | 11d0fc72beff801e97b61ad802a59eed0bf8c696 /plat/renesas | |
| parent | 7d58aed3b05fa8c677a7c823c1ca5017a462a3d3 (diff) | |
| download | arm-trusted-firmware-14f0a0817297905c03ddf2c4c6040482ef71d744.tar.gz | |
feat(plat/rcar3): add process of SSCG setting for R-Car D3
- Added the condition where output the SSCG (MD12) setting
to log for R-Car D3.
- Added the process to switching the bit rate of SCIF by the
SSCG (MD12) setting value for R-Car D3.
Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: Iaf07fa4df12dc233af0b57569ee4fa9329f670a9
Diffstat (limited to 'plat/renesas')
| -rw-r--r-- | plat/renesas/rcar/bl2_plat_setup.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/plat/renesas/rcar/bl2_plat_setup.c b/plat/renesas/rcar/bl2_plat_setup.c index 3bd20e230..e07b96f56 100644 --- a/plat/renesas/rcar/bl2_plat_setup.c +++ b/plat/renesas/rcar/bl2_plat_setup.c @@ -916,7 +916,7 @@ void bl2_el3_early_platform_setup(u_register_t arg1, u_register_t arg2, NOTICE("BL2: PRR is R-Car %s Ver.%d.%d\n", str, major, minor); } - if (product == PRR_PRODUCT_E3) { + if (PRR_PRODUCT_E3 == product || PRR_PRODUCT_D3 == product) { reg = mmio_read_32(RCAR_MODEMR); sscg = reg & RCAR_SSCG_MASK; str = sscg == RCAR_SSCG_ENABLE ? sscg_on : sscg_off; |