diff options
| author | Tien Hock, Loh <tien.hock.loh@intel.com> | 2019-10-02 13:49:25 +0800 |
|---|---|---|
| committer | Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> | 2020-02-25 10:19:51 +0800 |
| commit | d603fd3033c0ef31ee5fc1eccdcfbe77eaf53690 (patch) | |
| tree | 0f7c71247d31e99aac0bce7b5d453e558f8aa9f8 /plat/intel/soc/agilex | |
| parent | 2f39c55c085ae92b6eead06172096410e5aab81c (diff) | |
| download | arm-trusted-firmware-d603fd3033c0ef31ee5fc1eccdcfbe77eaf53690.tar.gz | |
intel: Enable EMAC PHY in Intel FPGA platform
This initializes the EMAC PHY in both Stratix 10 and Agilex,
without this, EMAC PHY wouldn't work correctly.
Change-Id: I7e6b9e88fd9ef472884fcf648e6001fcb7549ae6
Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Diffstat (limited to 'plat/intel/soc/agilex')
| -rw-r--r-- | plat/intel/soc/agilex/bl2_plat_setup.c | 6 | ||||
| -rw-r--r-- | plat/intel/soc/agilex/platform.mk | 5 |
2 files changed, 7 insertions, 4 deletions
diff --git a/plat/intel/soc/agilex/bl2_plat_setup.c b/plat/intel/soc/agilex/bl2_plat_setup.c index f32820777..a46c1a732 100644 --- a/plat/intel/soc/agilex/bl2_plat_setup.c +++ b/plat/intel/soc/agilex/bl2_plat_setup.c @@ -1,6 +1,6 @@ /* - * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. - * Copyright (c) 2019, Intel Corporation. All rights reserved. + * Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2019-2020, Intel Corporation. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -20,6 +20,7 @@ #include "agilex_pinmux.h" #include "ccu/ncore_ccu.h" #include "qspi/cadence_qspi.h" +#include "socfpga_emac.h" #include "socfpga_handoff.h" #include "socfpga_mailbox.h" #include "socfpga_private.h" @@ -72,6 +73,7 @@ void bl2_el3_early_platform_setup(u_register_t x0, u_register_t x1, socfpga_delay_timer_init(); init_ncore_ccu(); + socfpga_emac_init(); init_hard_memory_controller(); mailbox_init(); diff --git a/plat/intel/soc/agilex/platform.mk b/plat/intel/soc/agilex/platform.mk index f47c3f113..0a91c23dd 100644 --- a/plat/intel/soc/agilex/platform.mk +++ b/plat/intel/soc/agilex/platform.mk @@ -1,6 +1,6 @@ # -# Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. -# Copyright (c) 2019, Intel Corporation. All rights reserved. +# Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved. +# Copyright (c) 2019-2020, Intel Corporation. All rights reserved. # # SPDX-License-Identifier: BSD-3-Clause # @@ -42,6 +42,7 @@ BL2_SOURCES += \ plat/intel/soc/common/socfpga_delay_timer.c \ plat/intel/soc/common/socfpga_image_load.c \ plat/intel/soc/common/socfpga_storage.c \ + plat/intel/soc/common/soc/socfpga_emac.c \ plat/intel/soc/common/soc/socfpga_handoff.c \ plat/intel/soc/common/soc/socfpga_mailbox.c \ plat/intel/soc/common/soc/socfpga_reset_manager.c \ |