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authorYing-Chun Liu (PaulLiu) <paulliu@debian.org>2021-04-07 06:10:49 +0800
committerYing-Chun Liu (PaulLiu) <paulliu@debian.org>2021-09-14 21:42:01 +0800
commitf696843eab5cf0547b6c6307eaccea25678654c4 (patch)
tree26c6ddac1c36d12830f8269632644029f89051a6 /plat/imx
parent81d1d86c89da9051e245225c1963677b753363c1 (diff)
downloadarm-trusted-firmware-f696843eab5cf0547b6c6307eaccea25678654c4.tar.gz
feat(plat/imx/imx8m/imx8mp): add initial definition to facilitate FIP layout
Adds a number of definitions consistent with the established RSB3720 equivalents specifying number of io_handles and block devices. Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org> Change-Id: I401e48216d67257137351ee4d0b98904a76fa789
Diffstat (limited to 'plat/imx')
-rw-r--r--plat/imx/imx8m/imx8mp/include/platform_def.h21
1 files changed, 21 insertions, 0 deletions
diff --git a/plat/imx/imx8m/imx8mp/include/platform_def.h b/plat/imx/imx8m/imx8mp/include/platform_def.h
index 832bed17e..14b7ea00f 100644
--- a/plat/imx/imx8m/imx8mp/include/platform_def.h
+++ b/plat/imx/imx8m/imx8mp/include/platform_def.h
@@ -6,6 +6,7 @@
#ifndef PLATFORM_DEF_H
#define PLATFORM_DEF_H
+#include <common/tbbr/tbbr_img_def.h>
#include <lib/utils_def.h>
#include <lib/xlat_tables/xlat_tables_v2.h>
@@ -34,8 +35,23 @@
#define PLAT_WAIT_RET_STATE U(1)
#define PLAT_STOP_OFF_STATE U(3)
+#if defined(NEED_BL2)
+#define BL2_BASE U(0x960000)
+#define BL2_LIMIT U(0x980000)
+#define BL31_BASE U(0x940000)
+#define BL31_LIMIT U(0x960000)
+#define IMX_FIP_BASE U(0x40310000)
+#define IMX_FIP_SIZE U(0x000300000)
+#define IMX_FIP_LIMIT U(FIP_BASE + FIP_SIZE)
+
+/* Define FIP image location on eMMC */
+#define IMX_FIP_MMC_BASE U(0x100000)
+
+#define PLAT_IMX8MP_BOOT_MMC_BASE U(0x30B50000) /* SD */
+#else
#define BL31_BASE U(0x960000)
#define BL31_LIMIT U(0x980000)
+#endif
#define PLAT_PRI_BITS U(3)
#define PLAT_SDEI_CRITICAL_PRI 0x10
@@ -44,6 +60,7 @@
/* non-secure uboot base */
#define PLAT_NS_IMAGE_OFFSET U(0x40200000)
+#define PLAT_NS_IMAGE_SIZE U(0x00200000)
/* GICv3 base address */
#define PLAT_GICD_BASE U(0x38800000)
@@ -150,6 +167,10 @@
#define IMX_WDOG_B_RESET
+#define MAX_IO_HANDLES 3U
+#define MAX_IO_DEVICES 2U
+#define MAX_IO_BLOCK_DEVICES 1U
+
#define GIC_MAP MAP_REGION_FLAT(IMX_GIC_BASE, IMX_GIC_SIZE, MT_DEVICE | MT_RW)
#define AIPS_MAP MAP_REGION_FLAT(IMX_AIPS_BASE, IMX_AIPS_SIZE, MT_DEVICE | MT_RW) /* AIPS map */
#define OCRAM_S_MAP MAP_REGION_FLAT(OCRAM_S_BASE, OCRAM_S_SIZE, MT_MEMORY | MT_RW) /* OCRAM_S */