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author | Roberto Vargas <roberto.vargas@arm.com> | 2017-07-28 10:43:28 +0100 |
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committer | Roberto Vargas <roberto.vargas@arm.com> | 2017-08-23 10:29:44 +0100 |
commit | 3bbe34e5efb927494e18b75d3c20e8e914d2a1ca (patch) | |
tree | 56fd4f4f1b28b7c8a20371fdb0f8ecec47604e7f /plat/arm/board/common | |
parent | 784502aeaed11aad205eb80ed05b1f78fc643d93 (diff) | |
download | arm-trusted-firmware-3bbe34e5efb927494e18b75d3c20e8e914d2a1ca.tar.gz |
norflash: Add full status check
The nor_XXXXX functions may fail due to different reasons, and it
is convenient to do a full check to detect any failure. It is also
a good idea to have a specific function to do a full status check,
because new checks can be added to this function and they will be
incorporated automatically to any function calling it.
Change-Id: I54fed913e37ef574c1608e94139a519426348d12
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Diffstat (limited to 'plat/arm/board/common')
-rw-r--r-- | plat/arm/board/common/drivers/norflash/norflash.c | 71 |
1 files changed, 56 insertions, 15 deletions
diff --git a/plat/arm/board/common/drivers/norflash/norflash.c b/plat/arm/board/common/drivers/norflash/norflash.c index e0047c006..722cf33ee 100644 --- a/plat/arm/board/common/drivers/norflash/norflash.c +++ b/plat/arm/board/common/drivers/norflash/norflash.c @@ -8,16 +8,6 @@ #include <mmio.h> #include <norflash.h> -/* - * This file supplies a low level interface to the vexpress NOR flash - * memory of juno and fvp. This memory is organized as an interleaved - * memory of two chips with a 16 bit word. It means that every 32 bit - * access is going to access to two different chips. This is very - * important when we send commands or read status of the chips - */ - -/* Helper macros to access two flash banks in parallel */ -#define NOR_2X16(d) ((d << 16) | (d & 0xffff)) /* * DWS ready poll retries. The number of retries in this driver have been @@ -32,7 +22,30 @@ #define NOR_CMD_END (NOR_DWS | NOR_DWS << 16l) /* - * Poll Write State Machine. Return values: + * This file supplies a low level interface to the vexpress NOR flash + * memory of juno and fvp. This memory is organized as an interleaved + * memory of two chips with a 16 bit word. It means that every 32 bit + * access is going to access to two different chips. This is very + * important when we send commands or read status of the chips + */ + +/* Helper macros to access two flash banks in parallel */ +#define NOR_2X16(d) ((d << 16) | (d & 0xffff)) + +static unsigned int nor_status(uintptr_t base_addr) +{ + unsigned long status; + + nor_send_cmd(base_addr, NOR_CMD_READ_STATUS_REG); + status = mmio_read_32(base_addr); + status |= status >> 16; /* merge status from both flash banks */ + + return status & 0xFFFF; +} + +/* + * Poll Write State Machine. + * Return values: * 0 = WSM ready * -EBUSY = WSM busy after the number of retries */ @@ -50,6 +63,26 @@ static int nor_poll_dws(uintptr_t base_addr, unsigned long int retries) return -EBUSY; } +/* + * Return values: + * 0 = success + * -EPERM = Device protected or Block locked + * -EIO = General I/O error + */ +static int nor_full_status_check(uintptr_t base_addr) +{ + unsigned long status; + + /* Full status check */ + status = nor_status(base_addr); + + if (status & (NOR_PS | NOR_BLS | NOR_ESS | NOR_PSS)) + return -EPERM; + if (status & (NOR_VPPS | NOR_ES)) + return -EIO; + return 0; +} + void nor_send_cmd(uintptr_t base_addr, unsigned long cmd) { mmio_write_32(base_addr, NOR_2X16(cmd)); @@ -60,9 +93,8 @@ void nor_send_cmd(uintptr_t base_addr, unsigned long cmd) * can reset bits that were previously set. It cannot set bits that * were previously reset. The resulting bits = old_bits & new bits. * Return values: - * 0 = success - * -EBUSY = WSM not ready - * -EPERM = Device protected or Block locked + * 0 = success + * otherwise it returns a negative value */ int nor_word_program(uintptr_t base_addr, unsigned long data) { @@ -87,7 +119,10 @@ int nor_word_program(uintptr_t base_addr, unsigned long data) } } + if (ret == 0) + ret = nor_full_status_check(base_addr); nor_send_cmd(base_addr, NOR_CMD_READ_ARRAY); + return ret; } @@ -95,7 +130,7 @@ int nor_word_program(uintptr_t base_addr, unsigned long data) * Erase a full 256K block * Return values: * 0 = success - * -EBUSY = WSM not ready + * otherwise it returns a negative value */ int nor_erase(uintptr_t base_addr) { @@ -107,6 +142,8 @@ int nor_erase(uintptr_t base_addr) nor_send_cmd(base_addr, NOR_CMD_BLOCK_ERASE_ACK); ret = nor_poll_dws(base_addr, DWS_WORD_ERASE_RETRIES); + if (ret == 0) + ret = nor_full_status_check(base_addr); nor_send_cmd(base_addr, NOR_CMD_READ_ARRAY); return ret; @@ -128,6 +165,8 @@ int nor_lock(uintptr_t base_addr) nor_send_cmd(base_addr, NOR_LOCK_BLOCK); ret = nor_poll_dws(base_addr, DWS_WORD_LOCK_RETRIES); + if (ret == 0) + ret = nor_full_status_check(base_addr); nor_send_cmd(base_addr, NOR_CMD_READ_ARRAY); return ret; @@ -149,6 +188,8 @@ int nor_unlock(uintptr_t base_addr) nor_send_cmd(base_addr, NOR_UNLOCK_BLOCK); ret = nor_poll_dws(base_addr, DWS_WORD_LOCK_RETRIES); + if (ret == 0) + ret = nor_full_status_check(base_addr); nor_send_cmd(base_addr, NOR_CMD_READ_ARRAY); return ret; |