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authorManish Pandey <manish.pandey2@arm.com>2023-04-13 18:10:44 +0200
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2023-04-13 18:10:44 +0200
commit4a24538ae9cfa523d59f63ecd40438b42661f249 (patch)
tree136f0e8b44d6d5dde47b18a419a5e7a80649a3b2 /lib
parent9d124ecd56e8f2d4b71ca872e7e9221e64c3f53c (diff)
parentddb615b419074727ac0a1430cf0f88bd018ac8df (diff)
downloadarm-trusted-firmware-4a24538ae9cfa523d59f63ecd40438b42661f249.tar.gz
Merge "feat(hcx): initialize HCRX_EL2 to its default value" into integration
Diffstat (limited to 'lib')
-rw-r--r--lib/el3_runtime/aarch64/context_mgmt.c29
1 files changed, 28 insertions, 1 deletions
diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c
index 94d5ee1d2..c411b73ab 100644
--- a/lib/el3_runtime/aarch64/context_mgmt.c
+++ b/lib/el3_runtime/aarch64/context_mgmt.c
@@ -274,6 +274,19 @@ static void setup_ns_context(cpu_context_t *ctx, const struct entry_point_info *
u_register_t mdcr_el2 = ((read_pmcr_el0() >> PMCR_EL0_N_SHIFT) &
PMCR_EL0_N_MASK);
write_ctx_reg(get_el2_sysregs_ctx(ctx), CTX_MDCR_EL2, mdcr_el2);
+
+ if (is_feat_hcx_supported()) {
+ /*
+ * Initialize register HCRX_EL2 with its init value.
+ * As the value of HCRX_EL2 is UNKNOWN on reset, there is a
+ * chance that this can lead to unexpected behavior in lower
+ * ELs that have not been updated since the introduction of
+ * this feature if not properly initialized, especially when
+ * it comes to those bits that enable/disable traps.
+ */
+ write_ctx_reg(get_el2_sysregs_ctx(ctx), CTX_HCRX_EL2,
+ HCRX_EL2_INIT_VAL);
+ }
#endif /* CTX_INCLUDE_EL2_REGS */
}
@@ -612,8 +625,22 @@ void cm_prepare_el3_exit(uint32_t security_state)
assert(ctx != NULL);
if (security_state == NON_SECURE) {
+ uint64_t el2_implemented = el_implemented(2);
+
scr_el3 = read_ctx_reg(get_el3state_ctx(ctx),
CTX_SCR_EL3);
+
+ if (((scr_el3 & SCR_HCE_BIT) != 0U)
+ || (el2_implemented != EL_IMPL_NONE)) {
+ /*
+ * If context is not being used for EL2, initialize
+ * HCRX_EL2 with its init value here.
+ */
+ if (is_feat_hcx_supported()) {
+ write_hcrx_el2(HCRX_EL2_INIT_VAL);
+ }
+ }
+
if ((scr_el3 & SCR_HCE_BIT) != 0U) {
/* Use SCTLR_EL1.EE value to initialise sctlr_el2 */
sctlr_elx = read_ctx_reg(get_el1_sysregs_ctx(ctx),
@@ -629,7 +656,7 @@ void cm_prepare_el3_exit(uint32_t security_state)
sctlr_elx |= SCTLR_IESB_BIT;
#endif
write_sctlr_el2(sctlr_elx);
- } else if (el_implemented(2) != EL_IMPL_NONE) {
+ } else if (el2_implemented != EL_IMPL_NONE) {
el2_unused = true;
/*