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| author | Manish Pandey <manish.pandey2@arm.com> | 2023-05-11 11:14:50 +0200 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2023-05-11 11:14:50 +0200 |
| commit | 3331c33d03ec1cc361f6908044930d3178eeeb5f (patch) | |
| tree | 42e8f3424d5b9689ef0e359321a1e7acee1b839d /lib | |
| parent | 9d44b2b98119cf3b0a31926201267ea88332c235 (diff) | |
| parent | f4bbf435554e87de31c0a70039aa03b19962aaea (diff) | |
| download | arm-trusted-firmware-3331c33d03ec1cc361f6908044930d3178eeeb5f.tar.gz | |
Merge "feat(optee): add device tree for coreboot table" into integration
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/coreboot/coreboot_table.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/lib/coreboot/coreboot_table.c b/lib/coreboot/coreboot_table.c index fb31ef1e0..43e983590 100644 --- a/lib/coreboot/coreboot_table.c +++ b/lib/coreboot/coreboot_table.c @@ -46,6 +46,8 @@ typedef struct { coreboot_memrange_t coreboot_memranges[COREBOOT_MAX_MEMRANGES]; coreboot_serial_t coreboot_serial; +uint64_t coreboot_table_addr; +uint32_t coreboot_table_size; /* * The coreboot table is parsed before the MMU is enabled (i.e. with strongly @@ -108,6 +110,12 @@ coreboot_memory_t coreboot_get_memory_type(uintptr_t start, size_t size) return CB_MEM_NONE; } +void coreboot_get_table_location(uint64_t *address, uint32_t *size) +{ + *address = coreboot_table_addr; + *size = coreboot_table_size; +} + void coreboot_table_setup(void *base) { cb_header_t *header = base; @@ -118,6 +126,8 @@ void coreboot_table_setup(void *base) ERROR("coreboot table signature corrupt!\n"); return; } + coreboot_table_addr = (uint64_t) base; + coreboot_table_size = header->header_bytes + header->table_bytes; ptr = base + header->header_bytes; for (i = 0; i < header->table_entries; i++) { |