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authorMadhukar Pappireddy <madhukar.pappireddy@arm.com>2020-07-24 03:27:12 -0500
committerMadhukar Pappireddy <madhukar.pappireddy@arm.com>2021-01-29 10:30:18 -0600
commitc2d32a5f85a5889742cb7a971558944ecf330936 (patch)
treef7cb5effefed345796cbbbbd99b86d3a869e86c9 /lib/el3_runtime/aarch64/context.S
parent5bc6f28424dfe6b3368ee1ea9857d5bc6b13f126 (diff)
downloadarm-trusted-firmware-c2d32a5f85a5889742cb7a971558944ecf330936.tar.gz
Fix exception handlers in BL31: Use DSB to synchronize pending EA
For SoCs which do not implement RAS, use DSB as a barrier to synchronize pending external aborts at the entry and exit of exception handlers. This is needed to isolate the SErrors to appropriate context. However, this introduces an unintended side effect as discussed in the https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/3440 A summary of the side effect and a quick workaround is provided as part of this patch and summarized here: The explicit DSB at the entry of various exception vectors in BL31 for handling exceptions from lower ELs can inadvertently trigger an SError exception in EL3 due to pending asyncrhonouus aborts in lower ELs. This will end up being handled by serror_sp_elx in EL3 which will ultimately panic and die. The way to workaround is to update a flag to indicate if the exception truly came from EL3. This flag is allocated in the cpu_context structure. This is not a bullet proof solution to the problem at hand because we assume the instructions following "isb" that help to update the flag (lines 100-102 & 139-141) execute without causing further exceptions. Change-Id: I4d345b07d746a727459435ddd6abb37fda24a9bf Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
Diffstat (limited to 'lib/el3_runtime/aarch64/context.S')
-rw-r--r--lib/el3_runtime/aarch64/context.S7
1 files changed, 6 insertions, 1 deletions
diff --git a/lib/el3_runtime/aarch64/context.S b/lib/el3_runtime/aarch64/context.S
index 773082a85..75e214d9c 100644
--- a/lib/el3_runtime/aarch64/context.S
+++ b/lib/el3_runtime/aarch64/context.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -995,6 +995,11 @@ func el3_exit
* ----------------------------------------------------------
*/
esb
+#else
+ dsb sy
+#endif
+#ifdef IMAGE_BL31
+ str xzr, [sp, #CTX_EL3STATE_OFFSET + CTX_IS_IN_EL3]
#endif
exception_return