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| author | Olivier Deprez <olivier.deprez@arm.com> | 2020-03-20 14:22:05 +0100 |
|---|---|---|
| committer | Max Shvetsov <maksims.svecovs@arm.com> | 2020-03-20 16:15:28 +0000 |
| commit | 7f164a83a9d9cade9917f448c629d85913ff10c6 (patch) | |
| tree | d118cbd0161e8889e7b6d2009cf524f94a14938c /lib/el3_runtime/aarch64/context.S | |
| parent | c9796852718f66fab99f9e27d58e18fd757dbe60 (diff) | |
| download | arm-trusted-firmware-7f164a83a9d9cade9917f448c629d85913ff10c6.tar.gz | |
context: TPIDR_EL2 register not saved/restored
TPIDR_EL2 is missing from the EL2 state register save/restore
sequence. This patch adds it to the context save restore routines.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I35fc5ee82f97b72bcedac57c791312e7b3a45251
Diffstat (limited to 'lib/el3_runtime/aarch64/context.S')
| -rw-r--r-- | lib/el3_runtime/aarch64/context.S | 18 |
1 files changed, 12 insertions, 6 deletions
diff --git a/lib/el3_runtime/aarch64/context.S b/lib/el3_runtime/aarch64/context.S index 30ad7b7d1..221f33e06 100644 --- a/lib/el3_runtime/aarch64/context.S +++ b/lib/el3_runtime/aarch64/context.S @@ -100,7 +100,7 @@ func el2_sysregs_context_save stp x10, x11, [x0, #CTX_SPSR_EL2] mrs x12, tcr_el2 - mrs x13, TRFCR_EL2 + mrs x13, tpidr_el2 stp x12, x13, [x0, #CTX_TCR_EL2] mrs x14, ttbr0_el2 @@ -204,11 +204,14 @@ func el2_sysregs_context_save mrs x16, vsttbr_el2 str x16, [x0, #CTX_VSTTBR_EL2] + + mrs x17, TRFCR_EL2 + str x17, [x0, #CTX_TRFCR_EL2] #endif #if ARM_ARCH_AT_LEAST(8, 5) - mrs x17, scxtnum_el2 - str x17, [x0, #CTX_SCXTNUM_EL2] + mrs x9, scxtnum_el2 + str x9, [x0, #CTX_SCXTNUM_EL2] #endif ret @@ -289,7 +292,7 @@ func el2_sysregs_context_restore ldp x12, x13, [x0, #CTX_TCR_EL2] msr tcr_el2, x12 - msr TRFCR_EL2, x13 + msr tpidr_el2, x13 ldp x14, x15, [x0, #CTX_TTBR0_EL2] msr ttbr0_el2, x14 @@ -391,11 +394,14 @@ func el2_sysregs_context_restore ldr x16, [x0, #CTX_VSTTBR_EL2] msr vsttbr_el2, x16 + + ldr x17, [x0, #CTX_TRFCR_EL2] + msr TRFCR_EL2, x17 #endif #if ARM_ARCH_AT_LEAST(8, 5) - ldr x17, [x0, #CTX_SCXTNUM_EL2] - msr scxtnum_el2, x17 + ldr x9, [x0, #CTX_SCXTNUM_EL2] + msr scxtnum_el2, x9 #endif ret |