diff options
| author | Joshua Pimm <joshua.pimm@arm.com> | 2022-10-19 15:46:27 +0100 |
|---|---|---|
| committer | Joanna Farley <joanna.farley@arm.com> | 2023-04-04 11:35:29 +0200 |
| commit | fa37d30856fef6742bd82e4e0a3252a4d0b9e091 (patch) | |
| tree | 7c82241cf17c70e6da304ab4e1349a11a30f9b9d /include | |
| parent | d77c11e896e04be93caa4a56e50646af6806843f (diff) | |
| download | arm-trusted-firmware-fa37d30856fef6742bd82e4e0a3252a4d0b9e091.tar.gz | |
feat(ethos-n): add reset type to reset SMC calls
Adds a reset type argument for the soft and hard reset SMC calls to
indicate whether to perform a full reset and setup or only halt the
Arm(R) Ethos(TM)-N NPU. For use in cases where the NPU will not be
used but must be put into a known state, such as suspending the NPU
as part of power management.
Signed-off-by: Joshua Pimm <joshua.pimm@arm.com>
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com>
Change-Id: I6018af85a28b0e977166ec29d26f04739123140c
Diffstat (limited to 'include')
| -rw-r--r-- | include/drivers/arm/ethosn.h | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/include/drivers/arm/ethosn.h b/include/drivers/arm/ethosn.h index dbaf16cd7..ce7b2f30f 100644 --- a/include/drivers/arm/ethosn.h +++ b/include/drivers/arm/ethosn.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, Arm Limited. All rights reserved. + * Copyright (c) 2021-2023, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -39,21 +39,28 @@ /* Service version */ #define ETHOSN_VERSION_MAJOR U(2) -#define ETHOSN_VERSION_MINOR U(0) +#define ETHOSN_VERSION_MINOR U(1) /* Return codes for function calls */ #define ETHOSN_SUCCESS 0 #define ETHOSN_NOT_SUPPORTED -1 /* -2 Reserved for NOT_REQUIRED */ -/* -3 Reserved for INVALID_PARAMETER */ +#define ETHOSN_INVALID_PARAMETER -3 #define ETHOSN_FAILURE -4 #define ETHOSN_UNKNOWN_CORE_ADDRESS -5 #define ETHOSN_UNKNOWN_ALLOCATOR_IDX -6 +/* + * Argument types for soft and hard resets to indicate whether to reset + * and reconfigure the NPU or only halt it + */ +#define ETHOSN_RESET_TYPE_FULL U(0) +#define ETHOSN_RESET_TYPE_HALT U(1) + uintptr_t ethosn_smc_handler(uint32_t smc_fid, u_register_t core_addr, u_register_t asset_alloc_idx, - u_register_t x3, + u_register_t reset_type, u_register_t x4, void *cookie, void *handle, |