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| author | Madhukar Pappireddy <madhukar.pappireddy@arm.com> | 2021-11-08 15:28:19 +0100 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2021-11-08 15:28:19 +0100 |
| commit | 0b5e33c7aa6cf5723f68a2b6170b155832c965d1 (patch) | |
| tree | efcbed23ee8532247732888c15bb6bc7f1d7732b /include | |
| parent | 683bb4d7bdfd42e6e026902c43797f132b2a75d5 (diff) | |
| parent | 4c8fe6b17fa994a630b2a30f8666df103f2e370d (diff) | |
| download | arm-trusted-firmware-0b5e33c7aa6cf5723f68a2b6170b155832c965d1.tar.gz | |
Merge changes Ic2f90d79,Ieca02425,I615bcc1f,I6a9cb4a2,I5247f8f8, ... into integration
* changes:
fix(errata): workaround for Neoverse V1 erratum 2216392
fix(errata): workaround for Cortex A78 erratum 2242635
fix(errata): workaround for Neoverse-N2 erratum 2280757
fix(errata): workaround for Neoverse-N2 erratum 2242400
fix(errata): workaround for Neoverse-N2 erratum 2138958
fix(errata): workaround for Neoverse-N2 erratum 2242415
Diffstat (limited to 'include')
| -rw-r--r-- | include/lib/cpus/aarch64/neoverse_n2.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/lib/cpus/aarch64/neoverse_n2.h b/include/lib/cpus/aarch64/neoverse_n2.h index f414cb53c..a1e676ec2 100644 --- a/include/lib/cpus/aarch64/neoverse_n2.h +++ b/include/lib/cpus/aarch64/neoverse_n2.h @@ -28,6 +28,7 @@ ******************************************************************************/ #define NEOVERSE_N2_CPUACTLR_EL1 S3_0_C15_C1_0 #define NEOVERSE_N2_CPUACTLR_EL1_BIT_46 (ULL(1) << 46) +#define NEOVERSE_N2_CPUACTLR_EL1_BIT_22 (ULL(1) << 22) /******************************************************************************* * CPU Auxiliary Control register 2 specific definitions. @@ -40,6 +41,8 @@ ******************************************************************************/ #define NEOVERSE_N2_CPUACTLR5_EL1 S3_0_C15_C8_0 #define NEOVERSE_N2_CPUACTLR5_EL1_BIT_44 (ULL(1) << 44) +#define NEOVERSE_N2_CPUACTLR5_EL1_BIT_13 (ULL(1) << 13) +#define NEOVERSE_N2_CPUACTLR5_EL1_BIT_17 (ULL(1) << 17) /******************************************************************************* * CPU Auxiliary Control register specific definitions. |