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| author | Manish V Badarkhe <Manish.Badarkhe@arm.com> | 2022-12-12 10:14:25 +0000 |
|---|---|---|
| committer | Manish V Badarkhe <Manish.Badarkhe@arm.com> | 2023-03-08 19:51:17 +0000 |
| commit | 6b2e961fb1428c3fe213c524164a00fcaee495c4 (patch) | |
| tree | 31e090150ac1ef42905cd1623bca8daac1dea6a1 /include/plat | |
| parent | 1035e3a87a887e86b54c9d297208095dcf8303fb (diff) | |
| download | arm-trusted-firmware-6b2e961fb1428c3fe213c524164a00fcaee495c4.tar.gz | |
feat(arm): carveout DRAM1 area for Event Log
Reserved 4KB area for Event Log in DRAM1. This area is used by BL2
to copy Event Log from internal SRAM to this carved out DRAM region
in the subsequent patch.
Change-Id: I7b405775c66d249e31edf7688d95770e6c05c175
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Diffstat (limited to 'include/plat')
| -rw-r--r-- | include/plat/arm/common/arm_def.h | 48 |
1 files changed, 40 insertions, 8 deletions
diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h index 38793cd73..456145577 100644 --- a/include/plat/arm/common/arm_def.h +++ b/include/plat/arm/common/arm_def.h @@ -82,6 +82,7 @@ * - L1 GPT DRAM: Reserved for L1 GPT if RME is enabled * - REALM DRAM: Reserved for Realm world if RME is enabled * - TF-A <-> RMM SHARED: Area shared for communication between TF-A and RMM + * - Event Log: Area for Event Log if MEASURED_BOOT feature is enabled * - AP TZC DRAM: The remaining TZC secured DRAM reserved for AP use * * RME enabled(64MB) RME not enabled(16MB) @@ -89,13 +90,15 @@ * | | | | * | AP TZC (~28MB) | | AP TZC (~14MB) | * -------------------- ------------------- + * | Event Log | | Event Log | + * | (4KB) | | (4KB) | + * -------------------- ------------------- + * | REALM (RMM) | | | + * | (32MB - 4KB) | | EL3 TZC (2MB) | + * -------------------- ------------------- * | | | | - * | REALM (RMM) | | EL3 TZC (2MB) | - * | (32MB - 4KB) | ------------------- - * -------------------- | | - * | | | SCP TZC | - * | TF-A <-> RMM | 0xFFFF_FFFF------------------- - * | SHARED (4KB) | + * | TF-A <-> RMM | | SCP TZC | + * | SHARED (4KB) | 0xFFFF_FFFF------------------- * -------------------- * | | * | EL3 TZC (3MB) | @@ -114,7 +117,6 @@ */ #define ARM_EL3_TZC_DRAM1_SIZE UL(0x00300000) /* 3MB */ #define ARM_L1_GPT_SIZE UL(0x00100000) /* 1MB */ - /* 32MB - ARM_EL3_RMM_SHARED_SIZE */ #define ARM_REALM_SIZE (UL(0x02000000) - \ ARM_EL3_RMM_SHARED_SIZE) @@ -134,6 +136,25 @@ #define ARM_SCP_TZC_DRAM1_SIZE PLAT_ARM_SCP_TZC_DRAM1_SIZE #define ARM_SCP_TZC_DRAM1_END (ARM_SCP_TZC_DRAM1_BASE + \ ARM_SCP_TZC_DRAM1_SIZE - 1U) + +# if (defined(SPD_tspd) || defined(SPD_opteed) || defined(SPD_spmd)) && \ +MEASURED_BOOT +#define ARM_EVENT_LOG_DRAM1_SIZE UL(0x00001000) /* 4KB */ + +#if ENABLE_RME +#define ARM_EVENT_LOG_DRAM1_BASE (ARM_REALM_BASE - \ + ARM_EVENT_LOG_DRAM1_SIZE) +#else +#define ARM_EVENT_LOG_DRAM1_BASE (ARM_EL3_TZC_DRAM1_BASE - \ + ARM_EVENT_LOG_DRAM1_SIZE) +#endif /* ENABLE_RME */ +#define ARM_EVENT_LOG_DRAM1_END (ARM_EVENT_LOG_DRAM1_BASE + \ + ARM_EVENT_LOG_DRAM1_SIZE - \ + 1U) +#else +#define ARM_EVENT_LOG_DRAM1_SIZE UL(0) +#endif /* (SPD_tspd || SPD_opteed || SPD_spmd) && MEASURED_BOOT */ + #if ENABLE_RME #define ARM_L1_GPT_ADDR_BASE (ARM_DRAM1_BASE + \ ARM_DRAM1_SIZE - \ @@ -170,7 +191,9 @@ ARM_EL3_TZC_DRAM1_SIZE + \ ARM_EL3_RMM_SHARED_SIZE + \ ARM_REALM_SIZE + \ - ARM_L1_GPT_SIZE)) + ARM_L1_GPT_SIZE + \ + ARM_EVENT_LOG_DRAM1_SIZE)) + #define ARM_AP_TZC_DRAM1_END (ARM_AP_TZC_DRAM1_BASE + \ ARM_AP_TZC_DRAM1_SIZE - 1U) @@ -313,6 +336,15 @@ PLAT_ARM_TRUSTED_DRAM_SIZE, \ MT_MEMORY | MT_RW | MT_SECURE) +# if (defined(SPD_tspd) || defined(SPD_opteed) || defined(SPD_spmd)) && \ +MEASURED_BOOT +#define ARM_MAP_EVENT_LOG_DRAM1 \ + MAP_REGION_FLAT( \ + ARM_EVENT_LOG_DRAM1_BASE, \ + ARM_EVENT_LOG_DRAM1_SIZE, \ + MT_MEMORY | MT_RW | MT_SECURE) +#endif /* (SPD_tspd || SPD_opteed || SPD_spmd) && MEASURED_BOOT */ + #if ENABLE_RME /* * We add the EL3_RMM_SHARED size to RMM mapping to map the region as a block. |