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authorJustin Chadwell <justin.chadwell@arm.com>2019-07-03 14:15:22 +0100
committerJustin Chadwell <justin.chadwell@arm.com>2019-07-12 09:12:19 +0100
commit3e43121ed16996758342aafdc42806ea2a0fe181 (patch)
treea8dcf10c220f1120542143c54abd4d8eb5e2da94 /include/drivers/ufs.h
parentd3b6df7c3b0db0c5791dd92b66f195a601d69559 (diff)
downloadarm-trusted-firmware-3e43121ed16996758342aafdc42806ea2a0fe181.tar.gz
Update base code to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit. Change-Id: Iddd6f38139a4c6e500468b4fc48d04e0939f574e Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
Diffstat (limited to 'include/drivers/ufs.h')
-rw-r--r--include/drivers/ufs.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/drivers/ufs.h b/include/drivers/ufs.h
index a10cd8034..574c4ea0a 100644
--- a/include/drivers/ufs.h
+++ b/include/drivers/ufs.h
@@ -82,7 +82,7 @@
#define UECDME 0x48
/* UTP Transfer Request Interrupt Aggregation Control Register */
#define UTRIACR 0x4C
-#define UTRIACR_IAEN (1 << 31)
+#define UTRIACR_IAEN (1U << 31)
#define UTRIACR_IAPWEN (1 << 24)
#define UTRIACR_IASB (1 << 20)
#define UTRIACR_CTR (1 << 16)