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authorSona Mathew <SonaRebecca.Mathew@arm.com>2022-11-18 18:05:38 -0600
committerSona Mathew <SonaRebecca.Mathew@arm.com>2023-05-05 13:23:10 -0500
commitffea3844c00daf8dee466840a4932cac04b3eb57 (patch)
tree92f18d3415c5f382a13a72fedac10b343796754d /include/arch
parent76fef4757253fd140ca62c8450e4d2921a81a9da (diff)
downloadarm-trusted-firmware-ffea3844c00daf8dee466840a4932cac04b3eb57.tar.gz
feat(errata_abi): errata management firmware interface
This patch adds the errata management firmware interface for lower ELs to discover details about CPU erratum. Based on the CPU erratum identifier the interface enables the OS to find the mitigation of an erratum in EL3. The ABI can only be present in a system that is compliant with SMCCCv1.1 or higher. This implements v1.0 of the errata ABI spec. For details on all possible return values, refer the design documentation below: ABI design documentation: https://developer.arm.com/documentation/den0100/1-0?lang=en Signed-off-by: Sona Mathew <SonaRebecca.Mathew@arm.com> Change-Id: I70f0e2569cf92e6e02ad82e3e77874546232b89a
Diffstat (limited to 'include/arch')
-rw-r--r--include/arch/aarch32/arch.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/include/arch/aarch32/arch.h b/include/arch/aarch32/arch.h
index 8678bf3d8..3691497fa 100644
--- a/include/arch/aarch32/arch.h
+++ b/include/arch/aarch32/arch.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2022, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2023, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -16,8 +16,10 @@
#define MIDR_IMPL_SHIFT U(24)
#define MIDR_VAR_SHIFT U(20)
#define MIDR_VAR_BITS U(4)
+#define MIDR_VAR_MASK U(0xf)
#define MIDR_REV_SHIFT U(0)
#define MIDR_REV_BITS U(4)
+#define MIDR_REV_MASK U(0xf)
#define MIDR_PN_MASK U(0xfff)
#define MIDR_PN_SHIFT U(4)