diff options
| author | Andre Przywara <andre.przywara@arm.com> | 2022-11-17 16:42:09 +0000 |
|---|---|---|
| committer | Andre Przywara <andre.przywara@arm.com> | 2023-03-20 13:37:36 +0000 |
| commit | 9448f2b88e4afcea5ef671211882f09e7f64f9df (patch) | |
| tree | cb73d6624a00a32d0029f3972d8b40895865cb1e /include/arch/aarch64/arch.h | |
| parent | 023f1bed1dde23564e3b66a99c4a45b09e38992b (diff) | |
| download | arm-trusted-firmware-9448f2b88e4afcea5ef671211882f09e7f64f9df.tar.gz | |
refactor(mpam): enable FEAT_MPAM for FEAT_STATE_CHECKED
At the moment we only support FEAT_MPAM to be either unconditionally
compiled in, or to be not supported at all.
Add support for runtime detection (ENABLE_MPAM_FOR_LOWER_ELS=2), by
splitting get_mpam_version() into an ID register reading
function and a second function to report the support status. That
function considers both build time settings and runtime information (if
needed), and is used before we access MPAM related registers.
Also move the context saving code from assembly to C, and use the new
is_feat_mpam_supported() function to guard its execution.
ENABLE_MPAM_FOR_LOWER_ELS defaults to 0, so add a stub enable function
to cover builds with compiler optimisations turned off. The unused
mpam_enable() function call will normally be optimised away (because it
would never be called), but with -O0 the compiler will leave the symbol
in the object file.
Change-Id: I531d87cb855a7c43471f861f625b5a6d4bc61313
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'include/arch/aarch64/arch.h')
| -rw-r--r-- | include/arch/aarch64/arch.h | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/include/arch/aarch64/arch.h b/include/arch/aarch64/arch.h index b78652103..cafc1e8bc 100644 --- a/include/arch/aarch64/arch.h +++ b/include/arch/aarch64/arch.h @@ -1077,10 +1077,8 @@ #define MPAMHCR_EL2 S3_4_C10_C4_0 #define MPAM3_EL3 S3_6_C10_C5_0 -#define MPAMIDR_EL1_HAS_HCR_SHIFT ULL(0x11) -#define MPAMIDR_EL1_VPMR_MAX_SHIFT ULL(0x12) -#define MPAMIDR_EL1_VPMR_MAX_WIDTH ULL(0x3) -#define MPAMIDR_EL1_VPMR_MAX_POSSIBLE ULL(0x7) +#define MPAMIDR_EL1_VPMR_MAX_SHIFT ULL(18) +#define MPAMIDR_EL1_VPMR_MAX_MASK ULL(0x7) /******************************************************************************* * Definitions for system register interface to AMU for FEAT_AMUv1 ******************************************************************************/ |