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| author | Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> | 2021-07-12 19:14:11 +0900 |
|---|---|---|
| committer | Marek Vasut <marek.vasut+renesas@gmail.com> | 2021-09-12 01:13:48 +0200 |
| commit | d10f87674ecee54cffe1ab554cc05733fd16c7f0 (patch) | |
| tree | 4e7b94aa659ab0a279eb278b5f5d55264cbde221 /drivers/renesas | |
| parent | 63a7a34706eedba4d13ce6fc661a634801cf8909 (diff) | |
| download | arm-trusted-firmware-d10f87674ecee54cffe1ab554cc05733fd16c7f0.tar.gz | |
feat(plat/rcar3): modify operation register from SYSCISR to SYSCISCR
Modified the operation register to clearing the state bit of
the SYSCISR register from SYSCISR to SYSCISCR.
Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I9a0820b6414425fa2f4197f60852137827414a4d
Diffstat (limited to 'drivers/renesas')
| -rw-r--r-- | drivers/renesas/common/pwrc/pwrc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/renesas/common/pwrc/pwrc.c b/drivers/renesas/common/pwrc/pwrc.c index d29a0267c..4ebf04906 100644 --- a/drivers/renesas/common/pwrc/pwrc.c +++ b/drivers/renesas/common/pwrc/pwrc.c @@ -230,7 +230,7 @@ static void scu_power_up(uint64_t mpidr) while ((mmio_read_32(RCAR_SYSCISR) & sysc_reg_bit) == 0) ; - mmio_write_32(RCAR_SYSCISR, sysc_reg_bit); + mmio_write_32(RCAR_SYSCISCR, sysc_reg_bit); if ((lsi_product == PRR_PRODUCT_M3 && lsi_cut >= PRR_PRODUCT_30) || lsi_product == PRR_PRODUCT_H3 || |