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| author | Jit Loon Lim <jit.loon.lim@intel.com> | 2022-12-22 21:52:36 +0800 |
|---|---|---|
| committer | Sieu Mun Tang <sieu.mun.tang@intel.com> | 2023-04-14 09:19:31 +0800 |
| commit | 5f06bffa831638fd95d2160209000ef36d2a22ce (patch) | |
| tree | d4af3aeee5040bb2f39f5c087d5316723247b653 /docs/requirements.txt | |
| parent | 02a9d70c4deaa2102386611ac6b305838003148d (diff) | |
| download | arm-trusted-firmware-5f06bffa831638fd95d2160209000ef36d2a22ce.tar.gz | |
fix(intel): fix Agilex and N5X clock manager to main PLL C0
Update Agilex and N5X clock manager to get MPU clock from mainPLL C0
and PeriPLLC0.
1. Updated macro name PLAT_SYS_COUNTER_CONVERT_TO_MHZ to
PLAT_HZ_CONVERT_TO_MHZ.
2. Updated get_cpu_clk to point to get_mpu_clk and added comment.
3. Added get_mpu_clk to get clock from main PLL C0 and Peri PLL C0.
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I43a9d83caa832b61eba93a830e2a671fd4dffa19
Diffstat (limited to 'docs/requirements.txt')
0 files changed, 0 insertions, 0 deletions