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authorVenkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>2021-07-20 22:27:32 -0600
committerVenkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>2021-07-20 22:33:47 -0600
commit302b4dfb8fb0041959b8593a098ccae6c61e3238 (patch)
tree2267a261be3929826235a563735c2017ec6365fc /docs/plat
parente2a16044ad8ef33c7ce6e2c72c882d05583e1c38 (diff)
downloadarm-trusted-firmware-302b4dfb8fb0041959b8593a098ccae6c61e3238.tar.gz
feat(plat/versal): add support for SLS mitigation
This patch adds the option HARDEN_SLS_ALL that can be used to enable the -mharden-sls=all, which mitigates the straight-line speculation vulnerability. Enable this by adding the option HARDEN_SLS_ALL=1, default this will be disabled. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Change-Id: I0d498d9e96903fcb879993ad491949f6f17769b2
Diffstat (limited to 'docs/plat')
-rw-r--r--docs/plat/xilinx-versal.rst5
1 files changed, 5 insertions, 0 deletions
diff --git a/docs/plat/xilinx-versal.rst b/docs/plat/xilinx-versal.rst
index 3d4c4a4e1..d65b048e5 100644
--- a/docs/plat/xilinx-versal.rst
+++ b/docs/plat/xilinx-versal.rst
@@ -24,6 +24,11 @@ To build TF-A for JTAG DCC console
make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal bl31 VERSAL_CONSOLE=dcc
```
+To build TF-A with Straight-Line Speculation(SLS)
+```bash
+make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal bl31 HARDEN_SLS_ALL=1
+```
+
Xilinx Versal platform specific build options
---------------------------------------------