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| author | Harrison Mutai <harrison.mutai@arm.com> | 2022-11-11 14:09:55 +0000 |
|---|---|---|
| committer | Harrison Mutai <harrison.mutai@arm.com> | 2022-11-17 09:41:40 +0000 |
| commit | c7e698cfdedbe2b1c8212dd71477f289f7644953 (patch) | |
| tree | 62b5fac12eeb9dcf94a6642b8ef1e08f51d3b404 /docs/design | |
| parent | fbcbd88eb1fbf677f068094085ad08aa1d446b74 (diff) | |
| download | arm-trusted-firmware-c7e698cfdedbe2b1c8212dd71477f289f7644953.tar.gz | |
fix(cpus): workaround for Cortex-X3 erratum 2615812
Cortex-X3 erratum 2615812 is a Cat B erratum that applies to revisions
r0p0, r1p0, and r1p1, and is still open. The workaround is to disable
the use of the Full Retention power mode in the core (setting
WFI_RET_CTRL and WFE_RET_CTRL in CORTEX_X3_IMP_CPUPWRCTLR_EL1 to 0b000).
SDEN can be found here:
https://developer.arm.com/documentation/SDEN2055130/latest
Change-Id: I5ad66df3e18fc85a6b23f6662239494ee001d82f
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Diffstat (limited to 'docs/design')
| -rw-r--r-- | docs/design/cpu-specific-build-macros.rst | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 55e265c9a..d48f284fb 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -601,6 +601,10 @@ For Cortex-X3, the following errata build flags are defined : Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it is fixed in r1p1. +- ``ERRATA_X3_2615812``: This applies errata 2615812 workaround to Cortex-X3 + CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the + CPU, it is still open. + For Cortex-A510, the following errata build flags are defined : - ``ERRATA_A510_1922240``: This applies errata 1922240 workaround to |