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authorAlexeiFedorov <Alexei.Fedorov@arm.com>2022-09-23 16:57:28 +0100
committerSoby Mathew <soby.mathew@arm.com>2022-09-28 15:11:03 +0200
commit8e51cccaefc1e0e79ac2f0667ffec1cc46cf7665 (patch)
tree4238dd82a225934060809e762f05d7fab3370e6a /docs/components
parentaef9b0da2aa64b2bb6cd12bb43589074d861d3ac (diff)
downloadarm-trusted-firmware-8e51cccaefc1e0e79ac2f0667ffec1cc46cf7665.tar.gz
fix(rmmd): return X4 output value
Return values contained in 'smc_result' structure are shifted down by one register: X1 written by RMM is returned to NS in X0 and X5 is returned in X4. Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com> Change-Id: I92907ac3ff3bac8554643ae7c198a4a758c38cb3
Diffstat (limited to 'docs/components')
-rw-r--r--docs/components/rmm-el3-comms-spec.rst10
1 files changed, 8 insertions, 2 deletions
diff --git a/docs/components/rmm-el3-comms-spec.rst b/docs/components/rmm-el3-comms-spec.rst
index b76795833..8070ff446 100644
--- a/docs/components/rmm-el3-comms-spec.rst
+++ b/docs/components/rmm-el3-comms-spec.rst
@@ -494,8 +494,11 @@ EL3 must maintain a separate register context for the following:
#. General purpose registers (x0-x30) and ``sp_el0``, ``sp_el2`` stack pointers
#. EL2 system register context for all enabled features by EL3. These include system registers with the ``_EL2`` prefix. The EL2 physical and virtual timer registers must not be included in this.
-It is the responsibility of EL3 that the above registers will not be leaked to
-the NS Host and to maintain the confidentiality of the Realm World.
+As part of SMC forwarding between the NS world and Realm world, EL3 allows x0-x7 to be passed
+as arguments to Realm and x0-x4 to be used for return arguments back to Non Secure.
+As per SMCCCv1.2, x4 must be preserved if not being used as return argument by the SMC function
+and it is the responsibility of RMM to preserve this or use this as a return argument.
+EL3 will always copy x0-x4 from Realm context to NS Context.
EL3 will not save some registers as mentioned in the below list. It is the
responsibility of RMM to ensure that these are appropriately saved if the
@@ -506,6 +509,9 @@ Realm World makes use of them:
#. SME registers
#. EL1/0 registers
+It is the responsibility of EL3 that any other registers other than the ones mentioned above
+will not be leaked to the NS Host and to maintain the confidentiality of the Realm World.
+
SMCCC v1.3 allows NS world to specify whether SVE context is in use. In this
case, RMM could choose to not save the incoming SVE context but must ensure
to clear SVE registers if they have been used in Realm World. The same applies