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| author | Stephan Gerhold <stephan@gerhold.net> | 2023-03-26 13:07:25 +0200 |
|---|---|---|
| committer | Manish V Badarkhe <manish.badarkhe@arm.com> | 2023-05-09 21:46:18 +0200 |
| commit | a27e3f769832b8db21115a2b71d4f56fc0160e66 (patch) | |
| tree | a32d98cbf0c0d242512984d857f2413eba0fcd71 | |
| parent | 1781bf1c40594e3a3f36404da793d5c7a6bca533 (diff) | |
| download | arm-trusted-firmware-a27e3f769832b8db21115a2b71d4f56fc0160e66.tar.gz | |
style(msm8916): use size macros
Use the pre-defined size macros (SZ_*) for more clarity and to avoid
having to add comments to each size represented by hexadecimal numbers.
Change-Id: I6aebe2caf1365279670955b9b507dec7d7b04457
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
| -rw-r--r-- | plat/qti/msm8916/include/msm8916_mmap.h | 4 | ||||
| -rw-r--r-- | plat/qti/msm8916/include/platform_def.h | 6 |
2 files changed, 5 insertions, 5 deletions
diff --git a/plat/qti/msm8916/include/msm8916_mmap.h b/plat/qti/msm8916/include/msm8916_mmap.h index 406ae6b4e..d20153682 100644 --- a/plat/qti/msm8916/include/msm8916_mmap.h +++ b/plat/qti/msm8916/include/msm8916_mmap.h @@ -8,9 +8,9 @@ #define MSM8916_MMAP_H #define PCNOC_BASE 0x00000000 -#define PCNOC_SIZE 0x8000000 /* 128 MiB */ +#define PCNOC_SIZE SZ_128M #define APCS_BASE 0x0b000000 -#define APCS_SIZE 0x800000 /* 8 MiB */ +#define APCS_SIZE SZ_8M #define MPM_BASE (PCNOC_BASE + 0x04a0000) #define MPM_PS_HOLD (MPM_BASE + 0xb000) diff --git a/plat/qti/msm8916/include/platform_def.h b/plat/qti/msm8916/include/platform_def.h index bfade70a3..6d5ff2b33 100644 --- a/plat/qti/msm8916/include/platform_def.h +++ b/plat/qti/msm8916/include/platform_def.h @@ -16,11 +16,11 @@ * the overall limit to 128 KiB. This could be increased if needed by placing * the "msm8916_entry_point" variable explicitly in the first 64 KiB of BL31. */ -#define BL31_LIMIT (BL31_BASE + 0x20000) /* 128 KiB */ -#define BL31_PROGBITS_LIMIT (BL31_BASE + 0x10000) /* 64 KiB */ +#define BL31_LIMIT (BL31_BASE + SZ_128K) +#define BL31_PROGBITS_LIMIT (BL31_BASE + SZ_64K) #define CACHE_WRITEBACK_GRANULE U(64) -#define PLATFORM_STACK_SIZE U(0x1000) +#define PLATFORM_STACK_SIZE SZ_4K /* CPU topology: single cluster with 4 cores */ #define PLATFORM_CLUSTER_COUNT U(1) |