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| author | Manish Pandey <manish.pandey2@arm.com> | 2023-04-28 18:03:37 +0200 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2023-04-28 18:03:37 +0200 |
| commit | 48a65ec31aa7b5c28f2b0e8d3441bca6f264ee2e (patch) | |
| tree | 4ff373260b6badd264dc77b610efb78124a9571d | |
| parent | 76b225d41daf35e71209c7c1bc59684069a6ecac (diff) | |
| parent | fe38cc68975b23084b4ba512254926941c865a07 (diff) | |
| download | arm-trusted-firmware-48a65ec31aa7b5c28f2b0e8d3441bca6f264ee2e.tar.gz | |
Merge "feat(fvp): introduce PLATFORM_TEST_EA_FFH config" into integration
| -rw-r--r-- | plat/arm/board/fvp/aarch64/fvp_ea.c | 54 | ||||
| -rw-r--r-- | plat/arm/board/fvp/platform.mk | 8 |
2 files changed, 62 insertions, 0 deletions
diff --git a/plat/arm/board/fvp/aarch64/fvp_ea.c b/plat/arm/board/fvp/aarch64/fvp_ea.c new file mode 100644 index 000000000..07053a9cf --- /dev/null +++ b/plat/arm/board/fvp/aarch64/fvp_ea.c @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2023, Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include <inttypes.h> +#include <stdint.h> + +#include <arch_helpers.h> +#include <bl31/ea_handle.h> +#include <common/bl_common.h> +#include <common/debug.h> +#include <context.h> +#include <lib/el3_runtime/context_mgmt.h> +#include <plat/common/platform.h> + +/* + * This source file with custom plat_ea_handler function is compiled only when + * building TF-A with compile option PLATFORM_TEST_EA_FFH + */ + +/* Test address(non-existent) used in tftf to cause External aborts */ +#define TEST_ADDRESS UL(0x7FFFF000) + +void plat_ea_handler(unsigned int ea_reason, uint64_t syndrome, void *cookie, + void *handle, uint64_t flags) +{ +#ifdef PLATFORM_TEST_EA_FFH + u_register_t elr_el3; + u_register_t fault_address; + cpu_context_t *ctx = cm_get_context(NON_SECURE); + el3_state_t *el3_ctx = get_el3state_ctx(ctx); + gp_regs_t *gpregs_ctx = get_gpregs_ctx(ctx); + unsigned int level = (unsigned int)GET_EL(read_spsr_el3()); + + fault_address = read_ctx_reg(gpregs_ctx, CTX_GPREG_X0); + + if ((level < MODE_EL3) && (fault_address == TEST_ADDRESS)) { + if (ea_reason == ERROR_EA_SYNC) { + INFO("Handled sync EA from lower EL at address 0x%lx\n", fault_address); + /* To avoid continuous faults, forward return address */ + elr_el3 = read_ctx_reg(el3_ctx, CTX_ELR_EL3); + elr_el3 += 4; + write_ctx_reg(el3_ctx, CTX_ELR_EL3, elr_el3); + return; + } else if (ea_reason == ERROR_EA_ASYNC) { + INFO("Handled Serror from lower EL at address 0x%lx\n", fault_address); + return; + } + } +#endif + plat_default_ea_handler(ea_reason, syndrome, cookie, handle, flags); +} diff --git a/plat/arm/board/fvp/platform.mk b/plat/arm/board/fvp/platform.mk index fe6ccb2fe..af082ba0c 100644 --- a/plat/arm/board/fvp/platform.mk +++ b/plat/arm/board/fvp/platform.mk @@ -502,3 +502,11 @@ PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_el3_spmc.c endif PSCI_OS_INIT_MODE := 1 + +$(eval $(call add_define,PLATFORM_TEST_EA_FFH)) +ifeq (${PLATFORM_TEST_EA_FFH}, 1) + ifeq (${HANDLE_EA_EL3_FIRST_NS}, 0) + $(error "PLATFORM_TEST_EA_FFH expects HANDLE_EA_EL3_FIRST_NS to be 1") + endif +BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ea.c +endif |