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| author | Madhukar Pappireddy <madhukar.pappireddy@arm.com> | 2023-05-09 17:14:41 +0200 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2023-05-09 17:14:41 +0200 |
| commit | 315f4f8a84934de3391deb32582a5d07e7c2b823 (patch) | |
| tree | 0a49bf50a29f3fbcf33ed3a133babc324a95c299 | |
| parent | a26ecc17181af3a197e4115e99a84b8bd9bf8bc4 (diff) | |
| parent | a52c52518b18d80ff569bb4cc2696907d2d5e391 (diff) | |
| download | arm-trusted-firmware-315f4f8a84934de3391deb32582a5d07e7c2b823.tar.gz | |
Merge "docs: update TZC secured DRAM map for FVP and Juno" into integration
| -rw-r--r-- | docs/design/firmware-design.rst | 38 |
1 files changed, 34 insertions, 4 deletions
diff --git a/docs/design/firmware-design.rst b/docs/design/firmware-design.rst index 97f355045..2c9b76a01 100644 --- a/docs/design/firmware-design.rst +++ b/docs/design/firmware-design.rst @@ -1759,6 +1759,10 @@ BL image during boot. DRAM 0xffffffff +----------+ + | EL3 TZC | + 0xffe00000 |----------| (secure) + | AP TZC | + 0xff000000 +----------+ : : 0x82100000 |----------| |HW_CONFIG | @@ -1800,6 +1804,10 @@ BL image during boot. DRAM 0xffffffff +--------------+ + | EL3 TZC | + 0xffe00000 |--------------| (secure) + | AP TZC | + 0xff000000 +--------------+ : : 0x82100000 |--------------| | HW_CONFIG | @@ -1840,7 +1848,10 @@ BL image during boot. DRAM 0xffffffff +----------+ - | BL32 | (secure) + | EL3 TZC | + 0xffe00000 |----------| (secure) + | AP TZC | + | (BL32) | 0xff000000 +----------+ | | 0x82100000 |----------| @@ -1880,6 +1891,20 @@ BL image during boot. :: + DRAM + 0xFFFFFFFF +----------+ + | SCP TZC | + 0xFFE00000 |----------| + | EL3 TZC | + 0xFFC00000 |----------| (secure) + | AP TZC | + 0xFF000000 +----------+ + | | + : : (non-secure) + | | + 0x80000000 +----------+ + + Flash0 0x0C000000 +----------+ : : @@ -1909,9 +1934,14 @@ BL image during boot. :: DRAM - 0xFFE00000 +----------+ - | BL32 | (secure) - 0xFF000000 |----------| + 0xFFFFFFFF +----------+ + | SCP TZC | + 0xFFE00000 |----------| + | EL3 TZC | + 0xFFC00000 |----------| (secure) + | AP TZC | + | (BL32) | + 0xFF000000 +----------+ | | : : (non-secure) | | |