| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [PowerPC] Vector load/store builtins overstate alignment of pointers | Nemanja Ivanovic | 2018-11-26 | 1 | -24/+39 |
| * | [PowerPC] [Clang] [AltiVec] The second parameter of vec_sr function should be... | Zi Xuan Wu | 2018-11-09 | 1 | -29/+31 |
| * | [OpenCL] Add support of cl_intel_device_side_avc_motion_estimation extension | Andrew Savonichev | 2018-11-08 | 1 | -0/+631 |
| * | Revert r346326 [OpenCL] Add support of cl_intel_device_side_avc_motion_estima... | Andrew Savonichev | 2018-11-07 | 1 | -631/+0 |
| * | [OpenCL] Add support of cl_intel_device_side_avc_motion_estimation extension | Andrew Savonichev | 2018-11-07 | 1 | -0/+631 |
| * | [MS] Zero out ECX in __cpuid in intrin.h | Reid Kleckner | 2018-11-06 | 1 | -1/+1 |
| * | [COFF, ARM64] Implement InterlockedDecrement*_* builtins | Mandeep Singh Grang | 2018-11-06 | 1 | -36/+9 |
| * | [COFF, ARM64] Implement InterlockedIncrement*_* builtins | Mandeep Singh Grang | 2018-11-06 | 1 | -36/+9 |
| * | [COFF, ARM64] Implement InterlockedAnd*_* builtins | Mandeep Singh Grang | 2018-11-06 | 1 | -48/+12 |
| * | [COFF, ARM64] Implement InterlockedXor*_* builtins | Mandeep Singh Grang | 2018-11-06 | 1 | -48/+12 |
| * | Revert "[COFF, ARM64] Implement InterlockedXor*_* builtins" | Mandeep Singh Grang | 2018-11-06 | 1 | -0/+735 |
| * | [COFF, ARM64] Implement InterlockedXor*_* builtins | Mandeep Singh Grang | 2018-11-06 | 1 | -735/+0 |
| * | [COFF, ARM64] Implement InterlockedOr*_* builtins | Mandeep Singh Grang | 2018-11-06 | 1 | -48/+12 |
| * | [COFF, ARM64] Implement InterlockedCompareExchange*_* builtins | Mandeep Singh Grang | 2018-11-06 | 1 | -84/+24 |
| * | [COFF, ARM64] Implement InterlockedExchange*_* builtins | Mandeep Singh Grang | 2018-11-02 | 1 | -60/+12 |
| * | [ARM64] [Windows] Implement _InterlockedExchangeAdd*_* builtins. | Eli Friedman | 2018-10-31 | 1 | -48/+12 |
| * | [OpenCL] Remove PIPE_RESERVE_ID_VALID_BIT from opencl-c.h | Andrew Savonichev | 2018-10-23 | 1 | -1/+0 |
| * | [OpenCL] Add cl_intel_planar_yuv extension | Andrew Savonichev | 2018-10-23 | 1 | -0/+8 |
| * | [X86] Add more intrinsics to match icc. | Craig Topper | 2018-10-20 | 2 | -1/+111 |
| * | [X86] Add missing intrinsics to match icc. | Craig Topper | 2018-10-20 | 2 | -19/+270 |
| * | [COFF, ARM64] Add _ReadStatusReg and_WriteStatusReg intrinsics | Mandeep Singh Grang | 2018-10-18 | 1 | -0/+2 |
| * | [COFF, ARM64] Add _InterlockedAdd intrinsic | Mandeep Singh Grang | 2018-10-05 | 1 | -0/+1 |
| * | [COFF, ARM64] Add __getReg intrinsic | Mandeep Singh Grang | 2018-10-04 | 1 | -0/+7 |
| * | OpenCL: Mark printf format string argument | Matt Arsenault | 2018-10-03 | 1 | -1/+1 |
| * | [X86] Add more of the icc unaligned load/store to/from 128 bit vector intrinsics | Craig Topper | 2018-09-29 | 1 | -1/+106 |
| * | [X86] Add the movbe instruction intrinsics from icc. | Craig Topper | 2018-09-28 | 1 | -0/+59 |
| * | [X86] For lzcnt/tzcnt intrinsics use cttz/ctlz intrinsics with zero_undef fla... | Craig Topper | 2018-09-26 | 2 | -10/+10 |
| * | [CUDA] Added basic support for compiling with CUDA-10.0 | Artem Belevich | 2018-09-24 | 1 | -1/+7 |
| * | [X86] Add ktest intrinsics to match gcc and icc. | Craig Topper | 2018-08-31 | 2 | -0/+72 |
| * | [X86] Add k-mask conversion and load/store instrinsics to match gcc and icc. | Craig Topper | 2018-08-31 | 3 | -0/+80 |
| * | [X86] Add kshift intrinsics to match gcc and icc. | Craig Topper | 2018-08-31 | 3 | -0/+24 |
| * | [X86] Add kadd intrinsics to match gcc and icc. | Craig Topper | 2018-08-28 | 2 | -0/+24 |
| * | [X86] Add kortest intrinsics for 8, 32, and 64 bit masks. Add new intrinsic n... | Craig Topper | 2018-08-28 | 3 | -0/+72 |
| * | [X86] Add intrinsics for kand/kandn/knot/kor/kxnor/kxor with 8, 32, and 64-bi... | Craig Topper | 2018-08-27 | 3 | -0/+117 |
| * | [X86] Remove min_vector_width 512 from some intrinsics that operate only on k... | Craig Topper | 2018-08-27 | 1 | -0/+2 |
| * | [X86] Rename __DEFAULT_FN_ATTRS to a__DEFAULT_FN_ATTRS512 in avx512dqintrin.h... | Craig Topper | 2018-08-27 | 2 | -297/+295 |
| * | [X86] Undef __DEFAULT_FN_ATTRS in avx512fintrin.h. | Craig Topper | 2018-08-27 | 1 | -0/+1 |
| * | [X86] Don't set min_vector_width to 512 on intrinsics that only operate on k ... | Craig Topper | 2018-08-27 | 1 | -12/+13 |
| * | Make __shiftleft128 / __shiftright128 real compiler built-ins. | Nico Weber | 2018-08-17 | 1 | -14/+0 |
| * | [X86] Remove masking from the 512-bit paddus/psubus builtins. Use a select bu... | Craig Topper | 2018-08-16 | 1 | -56/+32 |
| * | [X86] Remove masking from the 512-bit padds and psubs builtins. Use select bu... | Craig Topper | 2018-08-16 | 1 | -56/+32 |
| * | [Headers] Define *_HAS_SUBNORM for FLT, DBL, LDBL | Pirama Arumuga Nainar | 2018-08-08 | 1 | -0/+6 |
| * | [Headers] Expand _Unwind_Exception for SEH on MinGW/x86_64 | Martin Storsjo | 2018-08-07 | 1 | -0/+4 |
| * | [clang] Fix broken include_next in float.h | Louis Dionne | 2018-08-06 | 1 | -3/+3 |
| * | Remove trailing space | Fangrui Song | 2018-07-30 | 5 | -10/+10 |
| * | [ms] Add __shiftleft128 / __shiftright128 intrinsics | Nico Weber | 2018-07-20 | 1 | -0/+14 |
| * | [CUDA] Provide integer SIMD functions for CUDA-9.2 | Artem Belevich | 2018-07-20 | 2 | -1/+429 |
| * | [COFF] Add more missing MSVC ARM64 intrinsics | Mandeep Singh Grang | 2018-07-17 | 1 | -2/+2 |
| * | Remove unnecessary trailing ; in macro intrinsic definition. | Eric Christopher | 2018-07-17 | 1 | -1/+1 |
| * | [X86] Lowering integer truncation intrinsics to native IR | Mikhail Dvoretckii | 2018-07-10 | 2 | -28/+32 |
