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author | Tim Northover <tnorthover@apple.com> | 2016-04-13 17:08:55 +0000 |
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committer | Tim Northover <tnorthover@apple.com> | 2016-04-13 17:08:55 +0000 |
commit | 4329eca357ee23753ccf00c9c0602d216739dee9 (patch) | |
tree | b22a48577c2b6cc9bce28e988f870eff0a5f36f3 /utils/perf-training | |
parent | 11b940607f9dab3090ae05f268c2815d9f60bf87 (diff) | |
download | clang-4329eca357ee23753ccf00c9c0602d216739dee9.tar.gz |
AArch64: allow 64-bit access to sysregs.
Although all the registers are actually 32-bits, I think we have to assume the
high 32-bits could be RES0 (the ARM ARM is unclear). If so, reading as a 32-bit
register can require extra zero extension operations.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@266212 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/perf-training')
0 files changed, 0 insertions, 0 deletions