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author | Gabor Buella <gabor.buella@intel.com> | 2018-05-08 07:12:34 +0000 |
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committer | Gabor Buella <gabor.buella@intel.com> | 2018-05-08 07:12:34 +0000 |
commit | c5f9ad1ca059a964627e303b7e09b6abe2c2cd53 (patch) | |
tree | 57a820ab0ebb3a11f6d60fdae1e01a9b7ed5aec5 /test/Headers/sgxintrin.c | |
parent | 467384e60340204c4225644064a182f2223507af (diff) | |
download | clang-c5f9ad1ca059a964627e303b7e09b6abe2c2cd53.tar.gz |
[x86] Introduce the encl[u|s|v] intrinsics
Reviewers: craig.topper, zvi
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D46435
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@331743 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Headers/sgxintrin.c')
-rw-r--r-- | test/Headers/sgxintrin.c | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/test/Headers/sgxintrin.c b/test/Headers/sgxintrin.c new file mode 100644 index 0000000000..8803847875 --- /dev/null +++ b/test/Headers/sgxintrin.c @@ -0,0 +1,27 @@ +// RUN: %clang_cc1 %s -ffreestanding -triple x86_64-unknown-unknown -target-feature +sgx -emit-llvm -o - | FileCheck %s --check-prefix=CHECK-64 +// RUN: %clang_cc1 %s -ffreestanding -triple i386 -target-feature +sgx -emit-llvm -o - | FileCheck %s --check-prefix=CHECK-32 + +#include <x86intrin.h> +#include <stdint.h> +#include <stddef.h> + +uint32_t test_encls(uint32_t leaf, size_t data[3]) { +// CHECK-64: call { i32, i64, i64, i64 } asm "encls", "={ax},={bx},={cx},={dx},{ax},{bx},{cx},{dx},~{cc},~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}) +// CHECK-32: call { i32, i32, i32, i32 } asm "encls", "={ax},={bx},={cx},={dx},{ax},{bx},{cx},{dx},~{cc},~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}) + + return _encls_u32(leaf, data); +} + +uint32_t test_enclu(uint32_t leaf, size_t data[3]) { +// CHECK-64: call { i32, i64, i64, i64 } asm "enclu", "={ax},={bx},={cx},={dx},{ax},{bx},{cx},{dx},~{cc},~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}) +// CHECK-32: call { i32, i32, i32, i32 } asm "enclu", "={ax},={bx},={cx},={dx},{ax},{bx},{cx},{dx},~{cc},~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}) + + return _enclu_u32(leaf, data); +} + +uint32_t test_enclv(uint32_t leaf, size_t data[3]) { +// CHECK-64: call { i32, i64, i64, i64 } asm "enclv", "={ax},={bx},={cx},={dx},{ax},{bx},{cx},{dx},~{cc},~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}}) +// CHECK-32: call { i32, i32, i32, i32 } asm "enclv", "={ax},={bx},={cx},={dx},{ax},{bx},{cx},{dx},~{cc},~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}, i32 %{{.*}}) + + return _enclv_u32(leaf, data); +} |