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| author | Pirama Arumuga Nainar <pirama@google.com> | 2016-03-18 16:58:36 +0000 |
|---|---|---|
| committer | Pirama Arumuga Nainar <pirama@google.com> | 2016-03-18 16:58:36 +0000 |
| commit | a98f4d0163adf9868db41b08dc0669bf585a7749 (patch) | |
| tree | 868df415fd61570231f0f069c4881abe898cbc60 /test/CodeGen | |
| parent | a4c20f8576a104262aa5e1ceaac18d77f053bab7 (diff) | |
| download | clang-a98f4d0163adf9868db41b08dc0669bf585a7749.tar.gz | |
Add -fnative-half-arguments-and-returns
Summary:
r246764 handled __fp16 arguments and returns for AAPCS, but skipped this
handling for OpenCL. Simlar to OpenCL, RenderScript also handles __fp16
type natively.
This patch adds the -fnative-half-arguments-and-returns command line
flag to allow such languages to skip this coercion of __fp16.
Reviewers: srhines, olista01
Subscribers: cfe-commits
Differential Revision: http://reviews.llvm.org/D18138
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@263795 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/arm-fp16-arguments.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/test/CodeGen/arm-fp16-arguments.c b/test/CodeGen/arm-fp16-arguments.c index 15a9ceb94c..65f076ac3c 100644 --- a/test/CodeGen/arm-fp16-arguments.c +++ b/test/CodeGen/arm-fp16-arguments.c @@ -1,5 +1,6 @@ // RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi soft -fallow-half-arguments-and-returns -emit-llvm -o - -O1 %s | FileCheck %s --check-prefix=CHECK --check-prefix=SOFT // RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi hard -fallow-half-arguments-and-returns -emit-llvm -o - -O1 %s | FileCheck %s --check-prefix=CHECK --check-prefix=HARD +// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi soft -fnative-half-arguments-and-returns -emit-llvm -o - -O1 %s | FileCheck %s --check-prefix=NATIVE __fp16 g; @@ -10,12 +11,17 @@ void t1(__fp16 a) { g = a; } // HARD: [[BITCAST:%.*]] = bitcast float [[PARAM]] to i32 // HARD: [[TRUNC:%.*]] = trunc i32 [[BITCAST]] to i16 // CHECK: store i16 [[TRUNC]], i16* bitcast (half* @g to i16*) +// NATIVE: define void @t1(half [[PARAM:%.*]]) +// NATIVE: store half [[PARAM]], half* @g __fp16 t2() { return g; } // SOFT: define i32 @t2() // HARD: define arm_aapcs_vfpcc float @t2() +// NATIVE: define half @t2() // CHECK: [[LOAD:%.*]] = load i16, i16* bitcast (half* @g to i16*) // CHECK: [[ZEXT:%.*]] = zext i16 [[LOAD]] to i32 // SOFT: ret i32 [[ZEXT]] // HARD: [[BITCAST:%.*]] = bitcast i32 [[ZEXT]] to float // HARD: ret float [[BITCAST]] +// NATIVE: [[LOAD:%.*]] = load half, half* @g +// NATIVE: ret half [[LOAD]] |