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author | Akira Hatanaka <ahatanaka@apple.com> | 2014-09-17 23:35:14 +0000 |
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committer | Akira Hatanaka <ahatanaka@apple.com> | 2014-09-17 23:35:14 +0000 |
commit | 381a99ee4c8448750680790056b65b89290e4e60 (patch) | |
tree | 71e93f05f9143631a8a9ae52611a23a288e19419 /test/CodeGen/x86_32-inline-asm.c | |
parent | 3323dc0c63162aba0cf015732abec4641ab07919 (diff) | |
download | clang-381a99ee4c8448750680790056b65b89290e4e60.tar.gz |
[X86, inline-asm] Check that the input size is correct for constraints R, q, Q,
S, D, A, y, x, f, t, and u.
This is a follow-up patch for r167717.
rdar://problem/11846140
rdar://problem/17476970
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@217994 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/x86_32-inline-asm.c')
-rw-r--r-- | test/CodeGen/x86_32-inline-asm.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/test/CodeGen/x86_32-inline-asm.c b/test/CodeGen/x86_32-inline-asm.c index 473f78ebca..65c7eeb578 100644 --- a/test/CodeGen/x86_32-inline-asm.c +++ b/test/CodeGen/x86_32-inline-asm.c @@ -1,5 +1,8 @@ // RUN: %clang_cc1 -triple i386-apple-darwin9 -verify %s + // <rdar://problem/12415959> +// rdar://problem/11846140 +// rdar://problem/17476970 typedef unsigned int u_int32_t; typedef u_int32_t uint32_t; @@ -7,6 +10,12 @@ typedef u_int32_t uint32_t; typedef unsigned long long u_int64_t; typedef u_int64_t uint64_t; +typedef float __m128 __attribute__ ((vector_size (16))); +typedef float __m256 __attribute__ ((vector_size (32))); + +__m128 val128; +__m256 val256; + int func1() { // Error out if size is > 32-bits. uint32_t msr = 0x8b; @@ -21,4 +30,17 @@ int func1() { unsigned char data; unsigned int port; __asm__ volatile("outb %0, %w1" : : "a" (data), "Nd" (port)); // No error expected. + + __asm__ volatile("outb %0, %w1" : : "R" (val), "Nd" (port)); // expected-error {{invalid input size for constraint 'R'}} + __asm__ volatile("outb %0, %w1" : : "q" (val), "Nd" (port)); // expected-error {{invalid input size for constraint 'q'}} + __asm__ volatile("outb %0, %w1" : : "Q" (val), "Nd" (port)); // expected-error {{invalid input size for constraint 'Q'}} + __asm__ volatile("outb %0, %w1" : : "b" (val), "Nd" (port)); // expected-error {{invalid input size for constraint 'b'}} + __asm__ volatile("outb %0, %w1" : : "c" (val), "Nd" (port)); // expected-error {{invalid input size for constraint 'c'}} + __asm__ volatile("outb %0, %w1" : : "d" (val), "Nd" (port)); // expected-error {{invalid input size for constraint 'd'}} + __asm__ volatile("outb %0, %w1" : : "S" (val), "Nd" (port)); // expected-error {{invalid input size for constraint 'S'}} + __asm__ volatile("outb %0, %w1" : : "D" (val), "Nd" (port)); // expected-error {{invalid input size for constraint 'D'}} + __asm__ volatile("foo1 %0" : : "A" (val128)); // expected-error {{invalid input size for constraint 'A'}} + __asm__ volatile("foo1 %0" : : "f" (val256)); // expected-error {{invalid input size for constraint 'f'}} + __asm__ volatile("foo1 %0" : : "t" (val256)); // expected-error {{invalid input size for constraint 't'}} + __asm__ volatile("foo1 %0" : : "u" (val256)); // expected-error {{invalid input size for constraint 'u'}} } |