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author | Warren Hunt <whunt@google.com> | 2014-02-21 23:49:50 +0000 |
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committer | Warren Hunt <whunt@google.com> | 2014-02-21 23:49:50 +0000 |
commit | 21db05d136d6af2e90dcb148a307a71908d31049 (patch) | |
tree | 10ec44dabec4c2e21c071f52a80d4523305ac7a6 /test/CodeGen/bitfield-2.c | |
parent | 9298d56cfbc5abd66ec296f7ea1273dd25339ed6 (diff) | |
download | clang-21db05d136d6af2e90dcb148a307a71908d31049.tar.gz |
Complete Rewrite of CGRecordLayoutBuilder
CGRecordLayoutBuilder was aging, complex, multi-pass, and shows signs of
existing before ASTRecordLayoutBuilder. It redundantly performed many
layout operations that are now performed by ASTRecordLayoutBuilder and
asserted that the results were the same. With the addition of support
for the MS-ABI, such as placement of vbptrs, vtordisps, different
bitfield layout and a variety of other features, CGRecordLayoutBuilder
was growing unwieldy in its redundancy.
This patch re-architects CGRecordLayoutBuilder to not perform any
redundant layout but rather, as directly as possible, lower an
ASTRecordLayout to an llvm::type. The new architecture is significantly
smaller and simpler than the CGRecordLayoutBuilder and contains fewer
ABI-specific code paths. It's also one pass.
The architecture of the new system is described in the comments. For the
most part, the new system simply takes all of the fields and bases from
an ASTRecordLayout, sorts them, inserts padding and dumps a record.
Bitfields, unions and primary virtual bases make this process a bit more
complicated. See the inline comments.
In addition, this patch updates a few lit tests due to the fact that the
new system computes more accurate llvm types than CGRecordLayoutBuilder.
Each change is commented individually in the review.
Differential Revision: http://llvm-reviews.chandlerc.com/D2795
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@201907 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/bitfield-2.c')
-rw-r--r-- | test/CodeGen/bitfield-2.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/bitfield-2.c b/test/CodeGen/bitfield-2.c index 58b17f17f0..c5154fcb19 100644 --- a/test/CodeGen/bitfield-2.c +++ b/test/CodeGen/bitfield-2.c @@ -11,7 +11,7 @@ // CHECK-RECORD: *** Dumping IRgen Record Layout // CHECK-RECORD: Record: RecordDecl{{.*}}s0 // CHECK-RECORD: Layout: <CGRecordLayout -// CHECK-RECORD: LLVMType:%struct.s0 = type <{ [3 x i8] }> +// CHECK-RECORD: LLVMType:%struct.s0 = type { [3 x i8] } // CHECK-RECORD: IsZeroInitializable:1 // CHECK-RECORD: BitFields:[ // CHECK-RECORD: <CGBitFieldInfo Offset:0 Size:24 IsSigned:1 StorageSize:24 StorageAlignment:1> @@ -51,7 +51,7 @@ unsigned long long test_0() { // CHECK-RECORD: *** Dumping IRgen Record Layout // CHECK-RECORD: Record: RecordDecl{{.*}}s1 // CHECK-RECORD: Layout: <CGRecordLayout -// CHECK-RECORD: LLVMType:%struct.s1 = type <{ [3 x i8] }> +// CHECK-RECORD: LLVMType:%struct.s1 = type { [3 x i8] } // CHECK-RECORD: IsZeroInitializable:1 // CHECK-RECORD: BitFields:[ // CHECK-RECORD: <CGBitFieldInfo Offset:0 Size:10 IsSigned:1 StorageSize:24 StorageAlignment:1> @@ -99,7 +99,7 @@ unsigned long long test_1() { // CHECK-RECORD: *** Dumping IRgen Record Layout // CHECK-RECORD: Record: RecordDecl{{.*}}u2 // CHECK-RECORD: Layout: <CGRecordLayout -// CHECK-RECORD: LLVMType:%union.u2 = type <{ i8 }> +// CHECK-RECORD: LLVMType:%union.u2 = type { i8 } // CHECK-RECORD: IsZeroInitializable:1 // CHECK-RECORD: BitFields:[ // CHECK-RECORD: <CGBitFieldInfo Offset:0 Size:3 IsSigned:0 StorageSize:8 StorageAlignment:1> @@ -271,7 +271,7 @@ _Bool test_6() { // CHECK-RECORD: *** Dumping IRgen Record Layout // CHECK-RECORD: Record: RecordDecl{{.*}}s7 // CHECK-RECORD: Layout: <CGRecordLayout -// CHECK-RECORD: LLVMType:%struct.s7 = type { i32, i32, i32, i8, [3 x i8], [4 x i8], [12 x i8] } +// CHECK-RECORD: LLVMType:%struct.s7 = type { i32, i32, i32, i8, i32, [12 x i8] } // CHECK-RECORD: IsZeroInitializable:1 // CHECK-RECORD: BitFields:[ // CHECK-RECORD: <CGBitFieldInfo Offset:0 Size:5 IsSigned:1 StorageSize:8 StorageAlignment:4> |