summaryrefslogtreecommitdiff
path: root/test/CodeGen/arm_acle.c
diff options
context:
space:
mode:
authorYi Kong <Yi.Kong@arm.com>2014-08-13 23:20:15 +0000
committerYi Kong <Yi.Kong@arm.com>2014-08-13 23:20:15 +0000
commit56b7cd4cadf893e3f8a4619af83f5f8e5154a933 (patch)
tree7b173e958f1d85910104e635e54b88734fccf455 /test/CodeGen/arm_acle.c
parente8b31f1fc7cf813c7af6110bc54e764225b0e9cb (diff)
downloadclang-56b7cd4cadf893e3f8a4619af83f5f8e5154a933.tar.gz
ARM: Add mappings for ACLE prefetch intrinsics
Implement __pld, __pldx, __pli and __plix builtin intrinsics as specified in ARM ACLE 2.0. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@215599 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/arm_acle.c')
-rw-r--r--test/CodeGen/arm_acle.c29
1 files changed, 29 insertions, 0 deletions
diff --git a/test/CodeGen/arm_acle.c b/test/CodeGen/arm_acle.c
index 8550c58b36..8a23df836e 100644
--- a/test/CodeGen/arm_acle.c
+++ b/test/CodeGen/arm_acle.c
@@ -62,6 +62,35 @@ void test_sevl(void) {
__sevl();
}
+/* 8.6 Memory prefetch intrinsics */
+/* 8.6.1 Data prefetch */
+// ARM-LABEL: test_pld
+// ARM: call void @llvm.prefetch(i8* null, i32 0, i32 3, i32 1)
+void test_pld() {
+ __pld(0);
+}
+
+// ARM-LABEL: test_pldx
+// AArch32: call void @llvm.prefetch(i8* null, i32 1, i32 3, i32 1)
+// AArch64: call void @llvm.prefetch(i8* null, i32 1, i32 1, i32 1)
+void test_pldx() {
+ __pldx(1, 2, 0, 0);
+}
+
+/* 8.6.2 Instruction prefetch */
+// ARM-LABEL: test_pli
+// ARM: call void @llvm.prefetch(i8* null, i32 0, i32 3, i32 0)
+void test_pli() {
+ __pli(0);
+}
+
+// ARM-LABEL: test_plix
+// AArch32: call void @llvm.prefetch(i8* null, i32 0, i32 3, i32 0)
+// AArch64: call void @llvm.prefetch(i8* null, i32 0, i32 1, i32 0)
+void test_plix() {
+ __plix(2, 0, 0);
+}
+
/* 8.7 NOP */
// ARM-LABEL: test_nop
// AArch32: call void @llvm.arm.hint(i32 0)