summaryrefslogtreecommitdiff
path: root/lib
diff options
context:
space:
mode:
authorSimon Tatham <simon.tatham@arm.com>2019-05-28 16:13:20 +0000
committerSimon Tatham <simon.tatham@arm.com>2019-05-28 16:13:20 +0000
commit173708d165c6145075ef941e6953f2c1c1167544 (patch)
treef7df6a901f15b2c070c4c9ad602991ec351fbc15 /lib
parentadbb459ee00ba8b946135bf445109dd34b81d614 (diff)
downloadclang-173708d165c6145075ef941e6953f2c1c1167544.tar.gz
[ARM] Replace fp-only-sp and d16 with fp64 and d32.
Those two subtarget features were awkward because their semantics are reversed: each one indicates the _lack_ of support for something in the architecture, rather than the presence. As a consequence, you don't get the behavior you want if you combine two sets of feature bits. Each SubtargetFeature for an FP architecture version now comes in four versions, one for each combination of those options. So you can still say (for example) '+vfp2' in a feature string and it will mean what it's always meant, but there's a new string '+vfp2d16sp' meaning the version without those extra options. A lot of this change is just mechanically replacing positive checks for the old features with negative checks for the new ones. But one more interesting change is that I've rearranged getFPUFeatures() so that the main FPU feature is appended to the output list *before* rather than after the features derived from the Restriction field, so that -fp64 and -d32 can override defaults added by the main feature. Reviewers: dmgreen, samparker, SjoerdMeijer Subscribers: srhines, javed.absar, eraman, kristof.beyls, hiraditya, zzheng, Petar.Avramovic, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D60691 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@361845 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Basic/Targets/ARM.cpp18
1 files changed, 8 insertions, 10 deletions
diff --git a/lib/Basic/Targets/ARM.cpp b/lib/Basic/Targets/ARM.cpp
index 55c0d37159..18ad466afe 100644
--- a/lib/Basic/Targets/ARM.cpp
+++ b/lib/Basic/Targets/ARM.cpp
@@ -400,8 +400,7 @@ bool ARMTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
HasFloat16 = true;
// This does not diagnose illegal cases like having both
- // "+vfpv2" and "+vfpv3" or having "+neon" and "+fp-only-sp".
- uint32_t HW_FP_remove = 0;
+ // "+vfpv2" and "+vfpv3" or having "+neon" and "-fp64".
for (const auto &Feature : Features) {
if (Feature == "+soft-float") {
SoftFloat = true;
@@ -409,19 +408,19 @@ bool ARMTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
SoftFloatABI = true;
} else if (Feature == "+vfp2") {
FPU |= VFP2FPU;
- HW_FP |= HW_FP_SP | HW_FP_DP;
+ HW_FP |= HW_FP_SP;
} else if (Feature == "+vfp3") {
FPU |= VFP3FPU;
- HW_FP |= HW_FP_SP | HW_FP_DP;
+ HW_FP |= HW_FP_SP;
} else if (Feature == "+vfp4") {
FPU |= VFP4FPU;
- HW_FP |= HW_FP_SP | HW_FP_DP | HW_FP_HP;
+ HW_FP |= HW_FP_SP | HW_FP_HP;
} else if (Feature == "+fp-armv8") {
FPU |= FPARMV8;
- HW_FP |= HW_FP_SP | HW_FP_DP | HW_FP_HP;
+ HW_FP |= HW_FP_SP | HW_FP_HP;
} else if (Feature == "+neon") {
FPU |= NeonFPU;
- HW_FP |= HW_FP_SP | HW_FP_DP;
+ HW_FP |= HW_FP_SP;
} else if (Feature == "+hwdiv") {
HWDiv |= HWDivThumb;
} else if (Feature == "+hwdiv-arm") {
@@ -432,8 +431,8 @@ bool ARMTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
Crypto = 1;
} else if (Feature == "+dsp") {
DSP = 1;
- } else if (Feature == "+fp-only-sp") {
- HW_FP_remove |= HW_FP_DP;
+ } else if (Feature == "+fp64") {
+ HW_FP |= HW_FP_DP;
} else if (Feature == "+8msecext") {
if (CPUProfile != "M" || ArchVersion != 8) {
Diags.Report(diag::err_target_unsupported_mcmse) << CPU;
@@ -449,7 +448,6 @@ bool ARMTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
DotProd = true;
}
}
- HW_FP &= ~HW_FP_remove;
switch (ArchVersion) {
case 6: