summaryrefslogtreecommitdiff
path: root/sim/riscv/ChangeLog
blob: 9eaffee34421ad0d1efb664dc8fa6f216ac485c2 (plain)
1
2
3
4
5
6
7
8
9
10
11
2021-02-04  Mike Frysinger  <vapier@gentoo.org>

	* sim-main.c: Include gdb/sim-riscv.h.
	(reg_fetch, reg_store): Define.
	(initialize_cpu): Assign reg_fetch & reg_store.

2021-02-04  Mike Frysinger  <vapier@gentoo.org>

	* Makefile.in, configure.ac, interp.c, machs.c, machs.h,
	model_list.def, sim-main.c, sim-main.h: New files.
	* aclocal.m4, config.in, configure: Regenerated.