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* sim: testsuite: add support for $pwd replacementsMike Frysinger2021-11-1619-20/+18
* sim: cris: replace @srcdir@ test extension with $srcdir/$subdirMike Frysinger2021-11-166-11/+9
* sim: cris: drop custom "dynamic" test fieldMike Frysinger2021-11-167-17/+0
* sim: testsuite: add more silent build rulesMike Frysinger2021-11-162-4/+16
* sim: cr16: fix build on gcc-12 (NULL comparison)Sergei Trofimovich2021-11-162-4/+3
* sim: run: support concise env var settingsMike Frysinger2021-11-162-2/+23
* sim: nrun: add --env-{set,unset,clear} command line optionsMike Frysinger2021-11-165-10/+107
* sim: syscall: hoist argc/argn/argnlen to common codeMike Frysinger2021-11-162-33/+40
* sim: syscall: fix argvlen & argv implementationMike Frysinger2021-11-161-42/+50
* sim: callback: expose argv & environMike Frysinger2021-11-1613-10/+73
* sim: keep track of program environment stringsMike Frysinger2021-11-1614-7/+85
* sim: iq2000: fix some missing prototypes warningsMike Frysinger2021-11-164-5/+10
* sim: cris: make error message test a little more flexibleMike Frysinger2021-11-151-1/+1
* sim: run: fix crash in argc==0 error situationMike Frysinger2021-11-151-7/+17
* sim: cris: touch up rvdummy handlingMike Frysinger2021-11-151-2/+2
* sim: cris: replace custom "dest" test field with new --argv0Mike Frysinger2021-11-154-8/+5
* sim: run: add --argv0 option to control argv[0]Mike Frysinger2021-11-154-4/+27
* sim: split program path out of argv vectorMike Frysinger2021-11-1531-119/+40
* sim: bfin: fix mach/xfail usage in testsMike Frysinger2021-11-154-6/+6
* sim: sh: fix switch-bool warningsMike Frysinger2021-11-131-51/+28
* sim: sh: rework carry checks to not rely on integer overflowsMike Frysinger2021-11-131-4/+4
* sim: testsuite: drop sim_compile cover functionMike Frysinger2021-11-112-14/+1
* sim: cris: stop testing a.out explicitly [ld/13900]Mike Frysinger2021-11-111-14/+0
* sim: io: tweak compiler workaround with error outputMike Frysinger2021-11-111-3/+3
* sim: testsuite: delete unused arm remote host logicMike Frysinger2021-11-103-24/+0
* sim: synacor: simplify test generationMike Frysinger2021-11-102-7/+4
* sim: frv: flip trapdump default back to offMike Frysinger2021-11-102-2/+2
* sim: sh: simplify testsuite a bitMike Frysinger2021-11-098-82/+12
* sim: cris: clean up missing func prototype warningsMike Frysinger2021-11-084-6/+6
* sim: sh: fix conversion of PC to an integerMike Frysinger2021-11-061-1/+1
* sim: sh: clean up time(NULL) callMike Frysinger2021-11-061-1/+1
* sim: sh: break utime logic out of _WIN32 checkMike Frysinger2021-11-061-1/+8
* sim: sh: drop errno externMike Frysinger2021-11-061-1/+0
* sim: sh: fix isnan redefinition with mingw targetsMike Frysinger2021-11-061-0/+2
* sim: arm/bfin/rx: undefine page size from system headersMike Frysinger2021-11-063-0/+5
* sim: ppc: switch to libiberty environ.hMike Frysinger2021-11-061-2/+2
* sim: sh: enable -Werror everywhereMike Frysinger2021-11-061-3/+0
* sim: sh: fix uninitialized variable usage with pdmsbMike Frysinger2021-11-061-1/+1
* sim: sh: constify a few read-only lookup tablesMike Frysinger2021-11-061-6/+6
* sim: sh: fix various parentheses warningsMike Frysinger2021-11-062-11/+11
* sim: sh: fix unused-value warningsMike Frysinger2021-11-061-3/+3
* sim: sh: rework register layout with anonymous unions & structsMike Frysinger2021-11-063-90/+82
* sim: mips: use sim_fpu_to{32,64}u to fix build warningsTiezhu Yang2021-11-062-7/+4
* sim: clarify license text via COPYING fileMike Frysinger2021-11-063-1155/+0
* sim: mips: fix missing prototype in multi-run generationMike Frysinger2021-11-032-0/+4
* sim: ppc: inline common sim-fpu.c logicMike Frysinger2021-11-033-33/+2
* sim: ppc: switch to common builds for callback objectsMike Frysinger2021-11-033-37/+6
* sim: mloop: mark a few conditionally used funcs as unusedMike Frysinger2021-11-032-3/+4
* sim: hoist cgen mloop rules up to common buildsMike Frysinger2021-11-0217-199/+707
* sim: hoist mn10300 & v850 igen rules up to common buildsMike Frysinger2021-11-027-153/+386
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