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* x86: Use individual prefix control for each opcode.Ilya Tocar2015-04-063-1914/+1941
* opcodes: d10v: fix old style prototypeMike Frysinger2015-03-302-1/+5
* Add the missing opcodes/ChangeLog entryH.J. Lu2015-03-291-0/+4
* Regenerate opcodes/Makefile.inH.J. Lu2015-03-291-1/+0
* powerpc: Only initialise opcode indices onceAnton Blanchard2015-03-262-25/+34
* powerpc: Add slbfee. instructionAnton Blanchard2015-03-262-0/+6
* Extend arm_feature_set struct to provide more bitsTerry Guo2015-03-242-1294/+2543
* Add znver1 processorGanesh Gopalasubramanian2015-03-177-5283/+5339
* MIPS: Fix constraint issues with the R6 beqc and bnec instructionsAndrew Bennett2015-03-132-2/+7
* Add support for MIPS R6 evp and dvp instructions.Andrew Bennett2015-03-132-0/+8
* S/390: Add more IBM z13 instructionsAndreas Krebbel2015-03-103-0/+30
* [AARCH64] Remove Load/Store register (unscaled immediate) alias.Jiong Wang2015-03-105-490/+439
* [ARM] Skip private symbol when doing objdumpJiong Wang2015-03-032-2/+9
* [SH] Fix clrs, sets, pref insn arch memberships.Oleg Endo2015-02-252-3/+10
* Adds a space between the operands of the RL78's MOV instruction for consisten...Vinay2015-02-233-8/+14
* Wrap a few opcodes headers in extern "C" for C++Pedro Alves2015-02-192-0/+12
* Fixes a problem with the RL78 disassembler which would incorrectly disassembl...Nick Clifton2015-02-113-93/+93
* opcodes/microblaze: Rename 'or', 'and', 'xor' to avoid C++ conflictPedro Alves2015-02-103-4/+13
* NDS32: Set branch instruction to relaxable.Kuan-Lin Chen2015-01-291-1/+2
* FT32 initial supportAlan Modra2015-01-289-0/+292
* NDS32/opcodes: Add new system registers.Kuan-Lin Chen2015-01-282-2/+14
* S/390: Add support for IBM z13.Andreas Krebbel2015-01-165-530/+1203
* Regenerate Makeile.in file for copyright updateAlan Modra2015-01-021-1/+1
* ChangeLog rotatation and copyright year updateAlan Modra2015-01-02265-1150/+1168
* Limit moxie sto/ldo offsets to 16 bitsAnthony Green2014-12-273-16/+22
* Add mul.x and umul.x instructions to moxie portAnthony Green2014-12-242-9/+14
* Add in a JALRC alias and fix the NAL instruction.Matthew Fortune2014-12-162-1/+7
* Add zex instructions for moxie portAnthony Green2014-12-122-2/+6
* Add Visium support to opcodesEric Botcazou2014-12-069-0/+886
* Power4 should treat mftb as extended mfspr mnemonicAlan Modra2014-11-302-6/+11
* Remove broken nios2 assembler dwim support.Sandra Loosemore2014-11-282-4/+9
* Don't deprecate powerpc mftb insnAlan Modra2014-11-282-7/+15
* Update libtool.m4 from GCC trunkH.J. Lu2014-11-242-2/+6
* Add AVX512VBMI instructionsIlya Tocar2014-11-178-5445/+5730
* Add AVX512IFMA instructionsIlya Tocar2014-11-178-5512/+5677
* Add pcommit instructionIlya Tocar2014-11-177-5262/+10575
* Add clwb instructionIlya Tocar2014-11-177-5260/+5310
* Add mach parameter to nios2_find_opcode_hash.Sandra Loosemore2014-11-062-3/+9
* Import updated translations supplied by the Translation Project.Nick Clifton2014-11-032-146/+372
* MIPS: Add Octeon 3 supportNaveen H.S2014-10-313-3/+29
* Updated/new translations provided by the Translations Project.Nick Clifton2014-10-292-270/+1059
* Refactoring/cleanup of nios2 opcodes and assembler code.Sandra Loosemore2014-10-233-451/+580
* ppc: enable msgclr and msgsnd on Power8Jan Beulich2014-10-212-2/+6
* opcodes, elf: annotate instructions with HWCAP2_VIS3B.Jose E. Marchesi2014-10-172-12/+13
* opcodes: fix several misplaced hwcap entries.Jose E. Marchesi2014-10-172-13/+18
* Bump bfd version.Tristan Gingold2014-10-152-10/+14
* This is a series of patches that add support for the SPARC M7 cpu toJose E. Marchesi2014-10-093-1441/+1507
* Ignore MOD field for control/debug register moveH.J. Lu2014-09-222-32/+19
* NDS32/opcodes: Add audio ISA extension and modify the disassemble implemnt.Kuan-Lin Chen2014-09-164-1842/+2327
* Add support for MIPS R6.Andrew Bennett2014-09-154-362/+786
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