summaryrefslogtreecommitdiff
path: root/opcodes
Commit message (Expand)AuthorAgeFilesLines
* x86: limit data passed to i386_dis_printf()Jan Beulich2023-04-281-22/+21
* x86: limit data passed to prefix_name()Jan Beulich2023-04-281-8/+13
* x86: rework AMX control insn disassemblyJan Beulich2023-04-281-107/+50
* x86: rework AMX multiplication insn disassemblyJan Beulich2023-04-281-110/+42
* RISC-V: Support XVentanaCondOps extensionPhilipp Tomsich2023-04-261-0/+4
* i386-dis.c UB shift and other tidiesAlan Modra2023-04-261-94/+76
* Revert "x86: work around compiler diagnosing dangling pointer"Alan Modra2023-04-241-6/+0
* gcc-13 i386-dis.c warningAlan Modra2023-04-241-16/+31
* x86: work around compiler diagnosing dangling pointerJan Beulich2023-04-241-0/+6
* Fix -Wmaybe-uninitialized warning in opcodes/i386-dis.cTom Tromey2023-04-212-1/+6
* x86: drop (explicit) BFD64 dependency from disassemblerJan Beulich2023-04-211-13/+4
* x86: drop use of setjmp() from disassemblerJan Beulich2023-04-211-5/+0
* x86: change fetch error handling for get<N>()Jan Beulich2023-04-211-133/+114
* x86: change fetch error handling when processing operandsJan Beulich2023-04-211-233/+276
* x86: change fetch error handling in get_valid_dis386()Jan Beulich2023-04-211-30/+26
* x86: change fetch error handling in ckprefix()Jan Beulich2023-04-211-12/+20
* x86: change fetch error handling in top-level functionJan Beulich2023-04-211-13/+59
* x86: move fetch error handling into a helper functionJan Beulich2023-04-211-28/+35
* RISC-V: Cache the latest mapping symbol and its boundary.Kito Cheng2023-04-181-0/+43
* arc: remove faulty instructionsClaudiu Zissulescu2023-04-122-720/+6
* Fix illegal memory access when disassembling corrupt NFP binaries.Nick Clifton2023-04-112-1/+9
* Support Intel AMX-COMPLEXHaochen Jiang2023-04-077-4711/+4808
* asan: csky floatformat_to_double uninitialised valueAlan Modra2023-04-031-10/+6
* opcodes/arm: adjust whitespace in cpsie instructionAndrew Burgess2023-04-031-2/+2
* RISC-V: Allocate "various" operand typeTsukasa OI2023-03-312-8/+24
* x86: parse VEX and alike specifiers for .insnJan Beulich2023-03-311-0/+2
* x86: introduce .insn directiveJan Beulich2023-03-313-0/+5
* aarch64: Add the RPRFM instructionRichard Sandiford2023-03-306-885/+925
* aarch64: Add the SVE FCLAMP instructionRichard Sandiford2023-03-302-759/+771
* aarch64: Add new SVE shift instructionsRichard Sandiford2023-03-302-873/+909
* aarch64: Add new SVE saturating conversion instructionsRichard Sandiford2023-03-302-752/+788
* aarch64: Add new SVE dot-product instructionsRichard Sandiford2023-03-306-841/+923
* aarch64: Add the SVE BFMLSL instructionsRichard Sandiford2023-03-302-742/+793
* aarch64: Add the SME2 UZP and ZIP instructionsRichard Sandiford2023-03-302-338/+438
* aarch64: Add the SME2 UNPK instructionsRichard Sandiford2023-03-302-709/+757
* aarch64: Add the SME2 shift instructionsRichard Sandiford2023-03-309-505/+679
* aarch64: Add the SME2 saturating conversion instructionsRichard Sandiford2023-03-306-468/+592
* aarch64: Add the SME2 FP<->FP conversion instructionsRichard Sandiford2023-03-302-948/+1000
* aarch64: Add the SME2 FP<->int conversion instructionsRichard Sandiford2023-03-302-749/+945
* aarch64: Add the SME2 CLAMP instructionsRichard Sandiford2023-03-302-820/+892
* aarch64: Add the SME2 MOPA and MOPS instructionsRichard Sandiford2023-03-302-717/+789
* aarch64: Add the SME2 vertical dot-product instructionsRichard Sandiford2023-03-302-669/+789
* aarch64: Add the SME2 dot-product instructionsRichard Sandiford2023-03-302-753/+1353
* aarch64: Add the SME2 MLALL and MLSLL instructionsRichard Sandiford2023-03-306-851/+1599
* aarch64: Add the SME2 MLAL and MLSL instructionsRichard Sandiford2023-03-308-665/+1485
* aarch64: Add the SME2 FMLA and FMLS instructionsRichard Sandiford2023-03-306-529/+753
* aarch64: Add the SME2 maximum/minimum instructionsRichard Sandiford2023-03-304-439/+979
* aarch64: Add the SME2 ADD and SUB instructionsRichard Sandiford2023-03-308-487/+750
* aarch64: Add the SME2 ZT0 instructionsRichard Sandiford2023-03-308-397/+686
* aarch64: Add the SME2 predicate-related instructionsRichard Sandiford2023-03-3010-821/+1270
View Lorry Controller Status