| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | PowerPC bc extended branch mnemonics and "y" hints | Alan Modra | 2019-04-05 | 2 | -141/+148 |
| * | PowerPC disassembler: Don't emit trailing spaces | Alan Modra | 2019-04-05 | 2 | -4/+16 |
| * | Add extended mnemonics for bctar. Fix setting of 'at' branch hints. | Peter Bergner | 2019-04-04 | 2 | -49/+298 |
| * | PR24390, Don't decode mtfsb field as a cr field | Alan Modra | 2019-03-28 | 3 | -6/+20 |
| * | Arm: Fix Arm disassembler mapping symbol search. | Tamar Christina | 2019-03-25 | 2 | -148/+107 |
| * | AArch64: Have -D override mapping symbol as documented. | Tamar Christina | 2019-03-25 | 2 | -1/+7 |
| * | AArch64: Fix AArch64 disassembler mapping symbol search | Tamar Christina | 2019-03-25 | 2 | -6/+43 |
| * | AArch64: Fix disassembler bug with out-of-order sections | Tamar Christina | 2019-03-25 | 2 | -1/+11 |
| * | ix86: Disable AVX512F when disabling AVX2 | H.J. Lu | 2019-03-19 | 3 | -7/+14 |
| * | x86: Optimize EVEX vector load/store instructions | H.J. Lu | 2019-03-18 | 3 | -12/+19 |
| * | Add missing changelogs for previous commits. | Andreas Krebbel | 2019-03-12 | 1 | -0/+9 |
| * | S/390: arch13: Adjust to recent changes | Andreas Krebbel | 2019-03-12 | 1 | -5/+5 |
| * | S/390: arch13: Add instruction descriptions | Andreas Krebbel | 2019-03-12 | 1 | -101/+115 |
| * | Add missing ChangeLog files for previous patch. | Jim Wilson | 2019-02-08 | 1 | -0/+5 |
| * | RISC-V: Compress 3-operand beq/bne against x0. | Jim Wilson | 2019-02-08 | 1 | -0/+2 |
| * | Arm: Backport hlt to all architectures. | Tamar Christina | 2019-02-07 | 2 | -1/+6 |
| * | AArch64: Add verifier for By elem Single and Double sized instructions. | Tamar Christina | 2019-02-07 | 4 | -9/+46 |
| * | Updated Swedish translation for the opcodes sub-directory | Nick Clifton | 2019-02-07 | 2 | -308/+352 |
| * | S/390: Implement instruction set extensions | Andreas Krebbel | 2019-01-31 | 4 | -0/+117 |
| * | AArch64: Add missing changelog for Update encodings for stg, st2g, stzg and s... | Tamar Christina | 2019-01-25 | 1 | -0/+9 |
| * | AArch64: Update encodings for stg, st2g, stzg and st2zg. | Sudi Das | 2019-01-25 | 1 | -10/+10 |
| * | AArch64: Add new STZGM instruction for Armv8.5-A Memory Tagging Extension. | Sudi Das | 2019-01-25 | 5 | -1580/+1599 |
| * | AArch64: Remove ldgv and stgv instructions from Armv8.5-A Memory Tagging Exte... | Sudi Das | 2019-01-25 | 10 | -1709/+1658 |
| * | Updated translations for some of the binutils subdirectory. | Nick Clifton | 2019-01-23 | 2 | -305/+351 |
| * | Updated translations for various binutils subdirectories. | Nick Clifton | 2019-01-21 | 3 | -609/+696 |
| * | [MIPS] fix typo in mips_arch_choices. | Chenghua Xu | 2019-01-20 | 2 | -3/+7 |
| * | Change version to 2.32.51 and regenerate configure and pot files. | Nick Clifton | 2019-01-19 | 3 | -263/+304 |
| * | Add markers for 2.32 branch to NEWS and ChangeLog files. | Nick Clifton | 2019-01-19 | 1 | -0/+4 |
| * | Add RXv3 instructions. | Yoshinori Sato | 2019-01-13 | 3 | -1569/+5442 |
| * | S12Z: Don't crash when disassembling invalid instructions. | John Darrington | 2019-01-09 | 2 | -3/+5 |
| * | S12Z: Fix disassembly of indexed OPR operands with zero index. | John Darrington | 2019-01-09 | 2 | -30/+32 |
| * | Adjust bfd/warning.m4 egrep patterns | Andrew Paprocki | 2019-01-09 | 2 | -5/+9 |
| * | s12z regen | Alan Modra | 2019-01-07 | 3 | -3/+9 |
| * | S12Z: opcodes: Separate the decoding of operations from their display. | John Darrington | 2019-01-03 | 8 | -2548/+3241 |
| * | Update year range in copyright notice of binutils files | Alan Modra | 2019-01-01 | 269 | -272/+276 |
| * | ChangeLog rotation | Alan Modra | 2019-01-01 | 2 | -2538/+2552 |
| * | PR24028, PPC_INT_FMT | Alan Modra | 2018-12-28 | 2 | -10/+16 |
| * | Include bfd_stdint.h in bfd.h | Alan Modra | 2018-12-18 | 8 | -6/+17 |
| * | RISC-V: Fix 4-arg add parsing. | Jim Wilson | 2018-12-07 | 2 | -1/+6 |
| * | sim/opcodes: Allow use of out of tree cgen source directory | Andrew Burgess | 2018-12-06 | 3 | -8/+26 |
| * | opcodes/riscv: Hide '.L0 ' fake symbols | Andrew Burgess | 2018-12-06 | 3 | -0/+28 |
| * | RISC-V: Accept version, supervisor ext and more than one NSE for -march. | Jim Wilson | 2018-12-03 | 2 | -1/+6 |
| * | [aarch64] - Only use MOV for disassembly when shifter op is LSL #0 | Egeyar Bagcioglu | 2018-12-03 | 2 | -1/+8 |
| * | RISC-V: Add missing c.unimp instruction. | Jim Wilson | 2018-11-29 | 2 | -1/+7 |
| * | RISC-V: Add .insn CA support. | Jim Wilson | 2018-11-27 | 2 | -2/+12 |
| * | S12Z opcodes: Fix bug disassembling certain shift instructions. | John Darrington | 2018-11-21 | 2 | -19/+30 |
| * | opcodes/nfp: Fix disassembly of crc[] with swapped operands. | Francois H. Theron | 2018-11-13 | 2 | -6/+10 |
| * | [BINUTILS, AARCH64, 8/8] Add data cache instructions for Memory Tagging Exten... | Sudakshina Das | 2018-11-12 | 2 | -0/+48 |
| * | [BINUTILS, AARCH64, 7/8] Add system registers for Memory Tagging Extension | Sudakshina Das | 2018-11-12 | 2 | -0/+35 |
| * | [BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging Extension | Sudakshina Das | 2018-11-12 | 10 | -1642/+1724 |
