| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Allow explicit size specifier for predicate operand of {sq, uq, }{incp, decp} | CaiJingtao | 2022-10-17 | 1 | -1/+2 |
| * | Update year range in copyright notice of binutils files | Alan Modra | 2022-01-02 | 1 | -1/+1 |
| * | aarch64: Add support for +mops | Richard Sandiford | 2021-12-02 | 1 | -0/+13 |
| * | Fix building the AArch64 assembler and disassembler when assertions are disab... | Nick Clifton | 2021-11-25 | 1 | -13/+13 |
| * | aarch64: [SME] SVE2 instructions added to support SME | Przemyslaw Wirkus | 2021-11-17 | 1 | -0/+67 |
| * | aarch64: [SME] Add SME mode selection and state access instructions | Przemyslaw Wirkus | 2021-11-17 | 1 | -0/+25 |
| * | aarch64: [SME] Add LD1x, ST1x, LDR and STR instructions | Przemyslaw Wirkus | 2021-11-17 | 1 | -0/+47 |
| * | aarch64: [SME] Add MOV and MOVA instructions | Przemyslaw Wirkus | 2021-11-17 | 1 | -0/+55 |
| * | arm64: add two initializers | Jan Beulich | 2021-04-19 | 1 | -2/+2 |
| * | Use bool in opcodes | Alan Modra | 2021-03-31 | 1 | -128/+128 |
| * | Fix places in the AArch64 opcodes library code where a call to assert() has s... | Nick Clifton | 2021-01-08 | 1 | -6/+7 |
| * | Update year range in copyright notice of binutils files | Alan Modra | 2021-01-01 | 1 | -1/+1 |
| * | aarch64: Add DSB instruction Armv8.7-a variant | Przemyslaw Wirkus | 2020-10-28 | 1 | -0/+15 |
| * | [AArch64, Binutils] Add missing TSB instruction | Sudakshina Das | 2020-04-20 | 1 | -0/+11 |
| * | Indent labels | Alan Modra | 2020-02-26 | 1 | -2/+2 |
| * | Update year range in copyright notice of binutils files | Alan Modra | 2020-01-01 | 1 | -1/+1 |
| * | [binutils][aarch64] Bfloat16 enablement [2/X] | Matthew Malcomson | 2019-11-07 | 1 | -0/+1 |
| * | [gas][aarch64][SVE2] Fix pmull{t,b} requirement on SVE2-AES | Matthew Malcomson | 2019-07-01 | 1 | -2/+2 |
| * | [binutils][aarch64] New sve_size_tsz_bhs iclass. | Matthew Malcomson | 2019-05-09 | 1 | -0/+6 |
| * | [binutils][aarch64] New sve_shift_tsz_bhsd iclass. | Matthew Malcomson | 2019-05-09 | 1 | -0/+1 |
| * | [binutils][aarch64] New SVE_SHRIMM_UNPRED_22 operand. | Matthew Malcomson | 2019-05-09 | 1 | -2/+4 |
| * | [binutils][aarch64] New sve_size_013 iclass. | Matthew Malcomson | 2019-05-09 | 1 | -0/+8 |
| * | [binutils][aarch64] New sve_size_bh iclass. | Matthew Malcomson | 2019-05-09 | 1 | -0/+1 |
| * | [binutils][aarch64] New sve_size_sd2 iclass. | Matthew Malcomson | 2019-05-09 | 1 | -0/+4 |
| * | [binutils][aarch64] New iclass sve_size_hsd2. | Matthew Malcomson | 2019-05-09 | 1 | -0/+5 |
| * | AArch64: Remove ldgv and stgv instructions from Armv8.5-A Memory Tagging Exte... | Sudi Das | 2019-01-25 | 1 | -11/+0 |
| * | Update year range in copyright notice of binutils files | Alan Modra | 2019-01-01 | 1 | -1/+1 |
| * | [BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging Extension | Sudakshina Das | 2018-11-12 | 1 | -0/+11 |
| * | [BINUTILS, AARCH64, 4/8] Add Tag setting instructions in Memory Tagging Exten... | Sudakshina Das | 2018-11-12 | 1 | -1/+2 |
| * | [BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Ex... | Sudakshina Das | 2018-11-12 | 1 | -0/+2 |
| * | AArch64: Constraint disassembler and assembler changes. | Tamar Christina | 2018-10-03 | 1 | -1/+33 |
| * | AArch64: Wire through instr_sequence | Tamar Christina | 2018-10-03 | 1 | -1/+2 |
| * | Implement Read/Write constraints on system registers on AArch64 | Tamar Christina | 2018-05-15 | 1 | -0/+31 |
| * | Modify AArch64 Assembly and disassembly functions to be able to fail and repo... | Tamar Christina | 2018-05-15 | 1 | -186/+248 |
| * | Update year range in copyright notice of binutils files | Alan Modra | 2018-01-03 | 1 | -1/+1 |
| * | Correct disassembly of dot product instructions. | Tamar Christina | 2017-12-19 | 1 | -1/+1 |
| * | Adds the new Fields and Operand types for the new instructions in Armv8.4-a. | Tamar Christina | 2017-11-09 | 1 | -0/+30 |
| * | [AArch64] Add dot product support for AArch64 to binutils | Tamar Christina | 2017-06-28 | 1 | -0/+14 |
| * | Don't compare boolean values against TRUE or FALSE | Alan Modra | 2017-05-18 | 1 | -3/+2 |
| * | [AArch64] Additional SVE instructions | Richard Sandiford | 2017-02-24 | 1 | -30/+48 |
| * | aarch64: actually copy first operand in convert_bfc_to_bfm() | Jan Beulich | 2017-02-22 | 1 | -2/+2 |
| * | Update year range in copyright notice of all files. | Alan Modra | 2017-01-02 | 1 | -1/+1 |
| * | AArch64/opcodes: Correct another `index' global shadowing error | Maciej W. Rozycki | 2016-12-08 | 1 | -8/+8 |
| * | [AArch64] Add ARMv8.3 FCMLA and FCADD instructions | Szabolcs Nagy | 2016-11-18 | 1 | -3/+47 |
| * | [AArch64] Add ARMv8.3 combined pointer authentication load instructions | Szabolcs Nagy | 2016-11-18 | 1 | -0/+24 |
| * | [AArch64] PR target/20666, fix wrong encoding of new introduced BFC pseudo | Jiong Wang | 2016-10-11 | 1 | -1/+1 |
| * | [AArch64][SVE 31/32] Add SVE instructions | Richard Sandiford | 2016-09-21 | 1 | -0/+43 |
| * | [AArch64][SVE 30/32] Add SVE instruction classes | Richard Sandiford | 2016-09-21 | 1 | -0/+84 |
| * | [AArch64][SVE 28/32] Add SVE FP immediate operands | Richard Sandiford | 2016-09-21 | 1 | -0/+45 |
| * | [AArch64][SVE 27/32] Add SVE integer immediate operands | Richard Sandiford | 2016-09-21 | 1 | -6/+91 |
