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* Add new AArch64 FP16 FM{A|S} instructions.Tamar Christina2017-11-162-1/+8
* Separate the new FP16 instructions backported from Armv8.4-a to Armv8.2-a int...Tamar Christina2017-11-152-1/+7
* PE: don't corrupt section flags when linking from ELF objectsJan Beulich2017-11-132-1/+10
* Enable the Dot Product extension by default for Armv8.4-a.Tamar Christina2017-11-092-1/+6
* Adds the new Fields and Operand types for the new instructions in Armv8.4-a.Tamar Christina2017-11-092-0/+16
* Split the ARM Crypto ISA extensions for AES and SHA1+2 into their own options...Tamar Christina2017-11-092-0/+11
* Change the type of the aarch64_feature_set typedef to unsigned long long so t...Nick Clifton2017-11-092-1/+6
* Split the AArch64 Crypto instructions for AES and SHA1+2 into their own optio...Nick Clifton2017-11-082-0/+7
* Adds command line support for Armv8.4-A, via the new command line option -mar...Jiong Wang2017-11-082-2/+14
* RISC-V: Add satp as an alias for sptbrPalmer Dabbelt2017-11-072-2/+11
* This patch similarly to the AArch64 one enables Dot Product support by defaul...Tamar Christina2017-11-072-19/+33
* aarch64: Remove AARCH64_FEATURE_F16 from AARCH64_ARCH_V8_2Siddhesh Poyarekar2017-11-022-1/+5
* FT32B is a new FT32 family member. It has a code compression scheme, which re...James Bowman2017-11-012-0/+8
* PR22348, conflicting global vars in crx and cr16Alan Modra2017-10-253-14/+13
* RISC-V: Only relax to C.LUI when imm != 0 and rd != 0/2Andrew Waterman2017-10-242-1/+6
* FT32: support for FT32B processor - part 1James Bowman2017-10-123-3/+394
* Handle FreeBSD-specific AT_EHDRFLAGS and AT_HWCAP auxiliary vector types.John Baldwin2017-10-052-0/+6
* LVU: dump loclists with locviewsAlexandre Oliva2017-09-223-0/+17
* Sync libiberty/ & include/ with GCCPedro Alves2017-09-1512-81/+1737
* nds32: Rename __BIT() to N32_BIT().Kuan-Lin Chen2017-09-112-2/+6
* Missing relocation R_PPC_VLE_ADDR20 and add VLE flag to details in readelfAlexander Fedotov-B556132017-09-052-0/+6
* [PowerPC VLE] Add SPE2 and EFS2 instructions supportAlexander Fedotov2017-08-242-0/+24
* compile: Add 'set compile-gcc'Jan Kratochvil2017-08-232-14/+54
* compile: set debug compile: Display GCC driver filenameJan Kratochvil2017-08-232-8/+35
* [PowerPC VLE] Add LSP (Lightweight Signal Processing) instruction supportAlexander Fedotov2017-08-212-0/+8
* Add new NT_PPC_* available since Linux 4.8Gustavo Romero2017-08-162-0/+42
* Treat common symbol as undefined for --no-define-commonH.J. Lu2017-08-062-0/+8
* Fix compile time error when using ansidecl.h with an old version of GCC.Nick Clifton2017-07-312-12/+24
* [ARC] Add SJLI instruction.Claudiu Zissulescu2017-07-192-0/+5
* [ARC] Add JLI support.John Eric Martin2017-07-193-1/+27
* Fix spelling typos.Yuri Chornovian2017-07-189-117/+134
* binutils/objdump: Fix disassemble for huge elf sectionsRavi Bangoria2017-07-142-1/+6
* Recognize the recently-added FreeBSD core dump note for LWP info.John Baldwin2017-07-072-0/+5
* Import include/+libiberty/ r249883 from upstream GCC.Jan Kratochvil2017-07-023-12/+34
* Add support for a __gcc_isr pseudo isntruction to the AVR assembler.Georg-Johann Lay2017-06-302-0/+10
* MIPS: Fix XPA base and Virtualization ASE instruction handlingMaciej W. Rozycki2017-06-302-0/+8
* S390: Support guarded-storage core note sectionsAndreas Arnez2017-06-292-0/+9
* [AArch64] Add dot product support for AArch64 to binutilsTamar Christina2017-06-282-0/+7
* [ARM] Assembler and disassembler support Dot Product ExtensionJiong Wang2017-06-282-1/+9
* MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor supportMaciej W. Rozycki2017-06-283-5/+33
* RISC-V: Use pc-relative relocation for FDE initial locationKuan-Lin Chen2017-06-262-0/+5
* Add pgste marker changelogAndreas Krebbel2017-06-261-0/+4
* [ARM] Add support for ARMv8-R in assembler and readelfThomas Preud'homme2017-06-243-1/+18
* [ARM] Remove ARMv6S-M special casingThomas Preud'homme2017-06-242-5/+15
* S/390: Add support for pgste markerAndreas Krebbel2017-06-231-0/+3
* x86: Support Intel Shadow Stack with SHSTK propertyH.J. Lu2017-06-223-0/+9
* x86: Support Intel IBT with IBT property and IBT-enable PLTH.J. Lu2017-06-223-0/+15
* [ARM] Rework Tag_CPU_arch build attribute value selectionThomas Preud'homme2017-06-212-0/+5
* Rewrite __start and __stop symbol handlingAlan Modra2017-06-162-3/+8
* Don't use print_insn_XXX in GDBYao Qi2017-06-142-8/+8
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