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* [PATCH v2 0/9] RISC-V: Support version controling for ISA standard extensions...Nelson Chu2020-05-203-261/+344
* Fix the ARM assembler to generate a Realtime profile for armv8-r.Alexander Fedotov2020-05-192-1/+7
* Power10 Reduced precision outer product operationsAlan Modra2020-05-112-13/+21
* PowerPC Rename powerxx to power10Alan Modra2020-05-113-3/+8
* AArch64: add GAS support for UDF instructionAlex Coplan2020-04-302-0/+6
* arc: Add support for ARC HS extra registers in core filesAnton Kolesov2020-04-232-0/+6
* xtensa: fix PR ld/25861Max Filippov2020-04-222-0/+12
* Remove SH-5 remnantsAlan Modra2020-04-212-21/+5
* Unify the behaviour of ld.bfd and ld.gold with respect to warning about unres...Fangrui Song2020-04-152-3/+12
* Fixes for the magic number used in PDP11 AOUT binaries.Stephen Casner2020-04-142-1/+9
* coff-go32-exe: support variable-length stubsJan W. Jagersma2020-04-023-48/+7
* include: Sync plugin-api.h with GCCMartin Liska2020-04-012-1/+7
* RISC-V: Update CSR to privileged spec 1.11.Nelson Chu2020-03-302-6/+23
* Support AT_BSDFLAGS on FreeBSD.John Baldwin2020-03-262-0/+5
* include: Sync plugin-api.h with GCCMartin Liska2020-03-242-2/+68
* include: Sync lto-symtab.h and plugin-api.h with GCCMartin Liska2020-03-213-2/+8
* Include: Sync lto-symtab.h and plugin-api.h with GCCMartin Liska2020-03-193-2/+56
* Implement NT_NETBSDCORE_LWPSTATUS (NetBSD-Core)Kamil Rytarowski2020-03-142-1/+6
* Register NT_NETBSDCORE_AUXV (NetBSD-Core)Kamil Rytarowski2020-03-132-0/+5
* Add support for non-contiguous memory regionsChristophe Lyon2020-03-132-0/+13
* Fix several mix up between octets and bytes in ELF program headersChristian Eggers2020-03-133-5/+15
* Fix several mix up between octets and bytes in ELF program headersChristian Eggers2020-03-132-12/+19
* ubsan: som: left shift of 1 by 31 placesAlan Modra2020-03-103-5/+11
* Add missing AT tags to the ELF common header.Luis Machado2020-03-032-0/+22
* Merge upstream GCC changes for include/ and libiberty/ directoriesAndrew Burgess2020-02-252-2/+10
* RISC-V: Support the ISA-dependent CSR checking.Nelson Chu2020-02-202-244/+249
* [binutils][arm] arm support for ARMv8.m Custom Datapath ExtensionMatthew Malcomson2020-02-102-0/+22
* Add support for the GBZ80 and Z80N variants of the Z80 architecture, and add ...Sergey Belyashov2020-02-073-0/+10
* ubsan: d30v: negation of -2147483648Alan Modra2020-02-042-1/+5
* Add some new PE_IMAGE_DEBUG_TYPE valuesJon Turney2020-01-302-0/+11
* Add markers for 2.34 branch to the NEWS files and ChangeLogs.Nick Clifton2020-01-181-0/+4
* Update libiberty sources with changes in the gcc mainline.Nick Clifton2020-01-174-24/+87
* [binutils][arm] PR25376 Change MVE into a CORE_HIGH featureAndre Vieira2020-01-162-4/+11
* MSP430: Fix relocation overflow when using #lo(EXP) macroJozef Lawrynowicz2020-01-152-0/+20
* [ARC][committed] Update ARC cpu listClaudiu Zissulescu2020-01-132-0/+8
* tic4x: sign extension using shiftsAlan Modra2020-01-132-5/+13
* ubsan: spu: left shift of negative valueAlan Modra2020-01-102-17/+29
* [ARC] Add finer details for LLOCK and SCONDShahab Vahedi2020-01-072-0/+6
* Add support for the GBZ80, Z180, and eZ80 variants of the Z80 architecure. A...Sergey Belyashov2020-01-023-0/+62
* Enable building the s12z target on Solaris hosts where REG_Y is defined in sy...Nick Clifton2020-01-022-10/+18
* Re: Update year range in copyright notice of binutils filesAlan Modra2020-01-011-0/+4
* Update year range in copyright notice of binutils filesAlan Modra2020-01-01283-283/+283
* ChangeLog rotationAlan Modra2020-01-012-761/+775
* Update copyright year range in all GDB files.Joel Brobecker2020-01-0122-22/+22
* Remove tic80 supportAlan Modra2019-12-173-406/+5
* ubsan: crx: left shift cannot be represented in type 'int'Alan Modra2019-12-162-1/+5
* ubsan: nds32: left shift cannot be represented in type 'int'Alan Modra2019-12-162-3/+10
* Fix unused function errorLuis Machado2019-12-122-9/+5
* bfd signed overflow fixesAlan Modra2019-12-112-8/+14
* ubsan: left shift of cannot be represented in type 'int'Alan Modra2019-12-113-22/+28