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* [AArch64] Add dot product support for AArch64 to binutilsTamar Christina2017-06-282-0/+7
* [ARM] Assembler and disassembler support Dot Product ExtensionJiong Wang2017-06-282-1/+9
* MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor supportMaciej W. Rozycki2017-06-283-5/+33
* RISC-V: Use pc-relative relocation for FDE initial locationKuan-Lin Chen2017-06-262-0/+5
* Add pgste marker changelogAndreas Krebbel2017-06-261-0/+4
* [ARM] Add support for ARMv8-R in assembler and readelfThomas Preud'homme2017-06-243-1/+18
* [ARM] Remove ARMv6S-M special casingThomas Preud'homme2017-06-242-5/+15
* S/390: Add support for pgste markerAndreas Krebbel2017-06-231-0/+3
* x86: Support Intel Shadow Stack with SHSTK propertyH.J. Lu2017-06-223-0/+9
* x86: Support Intel IBT with IBT property and IBT-enable PLTH.J. Lu2017-06-223-0/+15
* [ARM] Rework Tag_CPU_arch build attribute value selectionThomas Preud'homme2017-06-212-0/+5
* Rewrite __start and __stop symbol handlingAlan Modra2017-06-162-3/+8
* Don't use print_insn_XXX in GDBYao Qi2017-06-142-8/+8
* ld: Allow section groups to be resolved as part of a relocatable linkAndrew Burgess2017-06-062-0/+8
* PPC64_OPT_LOCALENTRYAlan Modra2017-06-012-0/+5
* Fix MinGW compilation warnings due to environ.hEli Zaretskii2017-05-312-0/+6
* [ARC] Add arc-cpu.def with processor definitionsAnton Kolesov2017-05-302-0/+53
* S/390: Improve error checking for optional operandsAndreas Krebbel2017-05-301-3/+4
* S/390: Remove optional operand flag.Andreas Krebbel2017-05-301-10/+6
* Move print_insn_XXX to an opcodes internal headerYao Qi2017-05-242-78/+7
* Refactor disassembler selectionYao Qi2017-05-242-2/+10
* [ARC] Update MAX_INSN_FLGS.claziss2017-05-232-1/+5
* x86: Add NOTRACK prefix supportH.J. Lu2017-05-222-0/+5
* binutils: support for the SPARC M8 processorJose E. Marchesi2017-05-193-2/+58
* Rename non_ir_ref to non_ir_ref_regularAlan Modra2017-05-162-1/+6
* non_ir_ref_dynamicAlan Modra2017-05-162-5/+10
* MIPS16e2: Add MIPS16e2 ASE supportMaciej W. Rozycki2017-05-153-6/+46
* Fix match and mask for 64-bit bb opcode.John David Anglin2017-05-142-1/+5
* [ARC] Object attributes.Claudiu Zissulescu2017-05-104-64/+146
* Handle symbol defined in IR and referenced in DSOH.J. Lu2017-04-202-0/+9
* Implement -z dynamic-undefined-weakAlan Modra2017-04-192-2/+8
* Reorder PPC_OPCODE_* and set PPC_OPCODE_TMR for e6500Alan Modra2017-04-112-43/+48
* Bye bye PPC_OPCODE_HTM and -mhtmAlan Modra2017-04-112-5/+1
* Bye Bye PPC_OPCODE_VSX3Alan Modra2017-04-112-3/+1
* Bye bye PPC_OPCODE_ALTIVEC2Alan Modra2017-04-112-3/+4
* Add support for disassembling WebAssembly opcodes.Pip Cet2017-04-062-0/+7
* -Wwrite-strings: Constify struct disassemble_info's disassembler_options fieldPedro Alves2017-04-052-4/+10
* Support ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXXH.J. Lu2017-04-042-0/+14
* RISC-V: Resurrect GP-relative disassembly hintsPalmer Dabbelt2017-04-042-0/+7
* RISC-V: Add physical memory protection CSRsAndrew Waterman2017-03-312-0/+83
* Add support for the WebAssembly file format and the wasm32 ELF conversion to ...Pip Cet2017-03-303-0/+233
* PowerPC -Mraw disassemblyAlan Modra2017-03-292-37/+48
* Add minimal support for WebAssembly backend to the BFD library.Pip Cet2017-03-272-0/+32
* Implement ARC NPS-400 Ultra Ip and Miscellaneous instructions.Rinat Zelig2017-03-272-6/+12
* S/390: Remove vx2 facility flagAndreas Krebbel2017-03-212-2/+6
* arc/nps400: Add cp16/cp32 instructions to opcodes libraryRinat Zelig2017-03-212-0/+5
* Add support for a GNU BUILD note type to record the enum size.Nick Clifton2017-03-162-0/+6
* Add DW_OP_GNU_variable_valueH.J. Lu2017-03-142-0/+8
* Sync libiberty sources with GCC.Nick Clifton2017-03-132-2/+16
* Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AA...Nick Clifton2017-03-132-2/+10
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