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path: root/include/opcode/aarch64.h
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* aarch64: Remove stray reglist variableRichard Sandiford2023-03-301-1/+1
* aarch64: Add the RPRFM instructionRichard Sandiford2023-03-301-0/+2
* aarch64: Add new SVE dot-product instructionsRichard Sandiford2023-03-301-1/+2
* aarch64: Add the SME2 shift instructionsRichard Sandiford2023-03-301-0/+3
* aarch64: Add the SME2 saturating conversion instructionsRichard Sandiford2023-03-301-0/+1
* aarch64: Add the SME2 MLALL and MLSLL instructionsRichard Sandiford2023-03-301-0/+5
* aarch64: Add the SME2 MLAL and MLSL instructionsRichard Sandiford2023-03-301-0/+4
* aarch64: Add the SME2 FMLA and FMLS instructionsRichard Sandiford2023-03-301-0/+2
* aarch64: Add the SME2 maximum/minimum instructionsRichard Sandiford2023-03-301-0/+1
* aarch64: Add the SME2 ADD and SUB instructionsRichard Sandiford2023-03-301-0/+3
* aarch64: Add the SME2 ZT0 instructionsRichard Sandiford2023-03-301-0/+11
* aarch64: Add the SME2 predicate-related instructionsRichard Sandiford2023-03-301-0/+11
* aarch64: Add the SME2 multivector LD1 and ST1 instructionsRichard Sandiford2023-03-301-0/+3
* aarch64: Add the SME2 MOVA instructionsRichard Sandiford2023-03-301-0/+10
* aarch64: Add support for predicate-as-counter registersRichard Sandiford2023-03-301-0/+5
* aarch64; Add support for vector offset rangesRichard Sandiford2023-03-301-4/+19
* aarch64: Add support for vgx2 and vgx4Richard Sandiford2023-03-301-0/+13
* aarch64: Add _off4 suffix to AARCH64_OPND_SME_ZA_arrayRichard Sandiford2023-03-301-3/+3
* aarch64: Add +sme2Richard Sandiford2023-03-301-0/+1
* aarch64: Add support for strided register listsRichard Sandiford2023-03-301-12/+26
* aarch64: Add a aarch64_cpu_supports_inst_p helperRichard Sandiford2023-03-301-0/+3
* aarch64: Add an operand class for SVE register listsRichard Sandiford2023-03-301-0/+1
* aarch64: Add an error code for out-of-range registersRichard Sandiford2023-03-301-1/+9
* aarch64: Deprioritise AARCH64_OPDE_REG_LISTRichard Sandiford2023-03-301-5/+9
* aarch64: Update operand_mismatch_kind_namesRichard Sandiford2023-03-301-1/+4
* aarch64: Move ZA range checks to aarch64-opc.cRichard Sandiford2023-03-301-0/+1
* aarch64: Make indexed_za use 64-bit immediatesRichard Sandiford2023-03-301-1/+1
* aarch64: Rename za_tile_vector to za_indexRichard Sandiford2023-03-301-10/+13
* aarch64: Make SME instructions use F_STRICTRichard Sandiford2023-03-301-0/+2
* aarch64: Add sme-i16i64 and sme-f64f64 aliasesRichard Sandiford2023-03-301-2/+2
* Update year range in copyright notice of binutils filesAlan Modra2023-01-011-1/+1
* aarch64: Add support for Common Short Sequence Compression extensionAndre Vieira2022-11-141-1/+5
* libopcodes/aarch64: add support for disassembler stylingAndrew Burgess2022-07-291-1/+27
* opcodes/aarch64: split off creation of comment text in disassemblerAndrew Burgess2022-06-291-1/+1
* AArch64: Enable FP16 by default for Armv9-A.Tamar Christina2022-05-181-0/+1
* Update year range in copyright notice of binutils filesAlan Modra2022-01-021-1/+1
* aarch64: Add support for Armv9.1-A to Armv9.3-ARichard Sandiford2021-12-161-40/+62
* aarch64: Add BC instructionRichard Sandiford2021-12-021-1/+3
* aarch64: Enforce P/M/E order for MOPS instructionsRichard Sandiford2021-12-021-7/+25
* aarch64: Add support for +mopsRichard Sandiford2021-12-021-1/+6
* aarch64: Add support for Armv8.8-ARichard Sandiford2021-12-021-0/+3
* aarch64: Tweak insn sequence codeRichard Sandiford2021-12-021-7/+5
* aarch64: [SME] SVE2 instructions added to support SMEPrzemyslaw Wirkus2021-11-171-0/+1
* aarch64: [SME] Add SME mode selection and state access instructionsPrzemyslaw Wirkus2021-11-171-0/+3
* aarch64: [SME] Add LD1x, ST1x, LDR and STR instructionsPrzemyslaw Wirkus2021-11-171-1/+11
* aarch64: [SME] Add ZERO instructionPrzemyslaw Wirkus2021-11-171-0/+1
* aarch64: [SME] Add MOV and MOVA instructionsPrzemyslaw Wirkus2021-11-171-0/+14
* aarch64: [SME] Add SME instructionsPrzemyslaw Wirkus2021-11-171-0/+4
* aarch64: [SME] Add +sme option to -marchPrzemyslaw Wirkus2021-11-171-0/+3
* aarch64: add armv9-a architecture to -marchPrzemyslaw Wirkus2021-09-301-0/+5
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