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* [PATCH v2 0/9] RISC-V: Support version controling for ISA standard extensions...Nelson Chu2020-05-201-0/+20
* Fix the ARM assembler to generate a Realtime profile for armv8-r.Alexander Fedotov2020-05-191-0/+5
* Power10 Reduced precision outer product operationsAlan Modra2020-05-111-0/+5
* PowerPC Rename powerxx to power10Alan Modra2020-05-111-0/+5
* AArch64: add GAS support for UDF instructionAlex Coplan2020-04-301-0/+5
* arc: Add support for ARC HS extra registers in core filesAnton Kolesov2020-04-231-0/+4
* xtensa: fix PR ld/25861Max Filippov2020-04-221-0/+6
* Remove SH-5 remnantsAlan Modra2020-04-211-0/+5
* Unify the behaviour of ld.bfd and ld.gold with respect to warning about unres...Fangrui Song2020-04-151-0/+7
* Fixes for the magic number used in PDP11 AOUT binaries.Stephen Casner2020-04-141-0/+5
* coff-go32-exe: support variable-length stubsJan W. Jagersma2020-04-021-0/+6
* include: Sync plugin-api.h with GCCMartin Liska2020-04-011-0/+6
* RISC-V: Update CSR to privileged spec 1.11.Nelson Chu2020-03-301-0/+4
* Support AT_BSDFLAGS on FreeBSD.John Baldwin2020-03-261-0/+4
* include: Sync plugin-api.h with GCCMartin Liska2020-03-241-0/+5
* include: Sync lto-symtab.h and plugin-api.h with GCCMartin Liska2020-03-211-0/+6
* Include: Sync lto-symtab.h and plugin-api.h with GCCMartin Liska2020-03-191-0/+13
* Implement NT_NETBSDCORE_LWPSTATUS (NetBSD-Core)Kamil Rytarowski2020-03-141-1/+5
* Register NT_NETBSDCORE_AUXV (NetBSD-Core)Kamil Rytarowski2020-03-131-0/+4
* Add support for non-contiguous memory regionsChristophe Lyon2020-03-131-0/+5
* Fix several mix up between octets and bytes in ELF program headersChristian Eggers2020-03-131-0/+9
* Fix several mix up between octets and bytes in ELF program headersChristian Eggers2020-03-131-0/+6
* ubsan: som: left shift of 1 by 31 placesAlan Modra2020-03-101-0/+6
* Add missing AT tags to the ELF common header.Luis Machado2020-03-031-0/+7
* Merge upstream GCC changes for include/ and libiberty/ directoriesAndrew Burgess2020-02-251-0/+8
* RISC-V: Support the ISA-dependent CSR checking.Nelson Chu2020-02-201-0/+5
* [binutils][arm] arm support for ARMv8.m Custom Datapath ExtensionMatthew Malcomson2020-02-101-0/+13
* Add support for the GBZ80 and Z80N variants of the Z80 architecture, and add ...Sergey Belyashov2020-02-071-0/+7
* ubsan: d30v: negation of -2147483648Alan Modra2020-02-041-0/+4
* Add some new PE_IMAGE_DEBUG_TYPE valuesJon Turney2020-01-301-0/+6
* Add markers for 2.34 branch to the NEWS files and ChangeLogs.Nick Clifton2020-01-181-0/+4
* Update libiberty sources with changes in the gcc mainline.Nick Clifton2020-01-171-0/+37
* [binutils][arm] PR25376 Change MVE into a CORE_HIGH featureAndre Vieira2020-01-161-0/+8
* MSP430: Fix relocation overflow when using #lo(EXP) macroJozef Lawrynowicz2020-01-151-0/+5
* [ARC][committed] Update ARC cpu listClaudiu Zissulescu2020-01-131-0/+4
* tic4x: sign extension using shiftsAlan Modra2020-01-131-0/+6
* ubsan: spu: left shift of negative valueAlan Modra2020-01-101-0/+9
* [ARC] Add finer details for LLOCK and SCONDShahab Vahedi2020-01-071-0/+4
* Add support for the GBZ80, Z180, and eZ80 variants of the Z80 architecure. A...Sergey Belyashov2020-01-021-0/+4
* Enable building the s12z target on Solaris hosts where REG_Y is defined in sy...Nick Clifton2020-01-021-0/+4
* Re: Update year range in copyright notice of binutils filesAlan Modra2020-01-011-0/+4
* ChangeLog rotationAlan Modra2020-01-011-761/+2
* Remove tic80 supportAlan Modra2019-12-171-0/+5
* ubsan: crx: left shift cannot be represented in type 'int'Alan Modra2019-12-161-0/+4
* ubsan: nds32: left shift cannot be represented in type 'int'Alan Modra2019-12-161-0/+6
* Fix unused function errorLuis Machado2019-12-121-0/+5
* bfd signed overflow fixesAlan Modra2019-12-111-0/+6
* ubsan: left shift of cannot be represented in type 'int'Alan Modra2019-12-111-0/+6
* PR24960, Memory leak from disassemblerAlan Modra2019-12-101-0/+5
* Use disassemble_info.private_data in place of insn_setsAlan Modra2019-12-101-0/+5
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