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* aarch64: Add CSR PDEC instructionPrzemyslaw Wirkus2020-10-287-0/+57
* aarch64: Add WFET instruction for Armv8.7-aPrzemyslaw Wirkus2020-10-283-1/+75
* aarch64: Add DSB instruction Armv8.7-a variantPrzemyslaw Wirkus2020-10-287-0/+107
* aarch64: Add basic support for armv8.7-a architecturePrzemyslaw Wirkus2020-10-283-2/+3
* gas: Clear all auto-assigned file slotsH.J. Lu2020-10-265-11/+89
* Update gas/ChangeLog of last commitLifang Xia2020-10-261-0/+5
* C-SKY: Fix the literal dump of big vector constant.Cooper Qu2020-10-261-1/+2
* CSKY: Change plsl.u16 to plsl.16.Cooper Qu2020-10-263-2/+7
* CSKY: Add version flag in eflag and fix bug in disassembling register.Cooper Qu2020-10-262-2/+5
* CSKY: Fix and add some instructions for VDSPV1.Cooper Qu2020-10-263-27/+47
* Change avxvnni disassembler output from {vex3} to {vex}Cui,Lili2020-10-263-32/+38
* [PATCH][GAS][AArch64] Define BRBE system registersPrzemyslaw Wirkus2020-10-226-2/+425
* aarch64: Define CSRE system registersPrzemyslaw Wirkus2020-10-226-1/+70
* arm: Fix the wrong error message string for mve vldr/vstr (PR26763).Srinath Parvathaneni2020-10-225-1/+864
* Fix printf formatting errors where "0x" is used as a prefix for a decimal num...Dr. David Alan Gilbert2020-10-223-3522/+3347
* aarch64: Add testcase for HCR_EL2 system registerPrzemyslaw Wirkus2020-10-212-0/+11
* Add AMD znver3 processor supportGanesh Gopalasubramanian2020-10-2018-3/+263
* gas: Add a -gdwarf-5 debug_line test with .s fileH.J. Lu2020-10-174-0/+62
* gas: Replace dwarf5-line-2.S with dwarf5-line-3.SH.J. Lu2020-10-173-4/+12
* gas: Always use as_where for preprocessed assembly codesH.J. Lu2020-10-177-19/+155
* gas: Reuse the input file entry in the file tableH.J. Lu2020-10-165-19/+84
* Enhancement for avx-vnni patchCui,Lili2020-10-1611-28/+41
* x86: Support Intel AVX VNNIH.J. Lu2020-10-149-2/+171
* x86: Add support for Intel HRESET instructionLili Cui2020-10-148-1/+50
* x86: Support Intel UINTRLili Cui2020-10-147-1/+46
* x86: Remove the prefix byte from non-VEX/EVEX base_opcodeH.J. Lu2020-10-142-24/+29
* x86: Rename VexOpcode to OpcodePrefixH.J. Lu2020-10-132-30/+53
* x86: Support GNU_PROPERTY_X86_ISA_1_V[234] markerH.J. Lu2020-10-0934-123/+218
* aarch64: Fix bogus type punning in parse_barrier() [PR26699]Alex Coplan2020-10-064-7/+11
* A small set of code improvements for the Z80 assembler.Sergey Belyashav2020-10-062-7/+33
* Fix gas sh-link-zero test for hppa64-hpuxAlan Modra2020-10-062-7/+11
* [PATCH][GAS][AArch64] Update Cortex-X1 feature flagsPrzemyslaw Wirkus2020-10-051-2/+6
* [PATCH][GAS][arm] Update Cortex-X1 feature flagsPrzemyslaw Wirkus2020-10-051-1/+1
* Add NetBSD AArch64 GAS support.Kamil Rytarowski2020-10-052-0/+5
* Fix spelling mistakesSamanta Navarro2020-10-053-2/+7
* i386: Allow non-absolute segment values for lcall/ljmpT.K. Chia2020-10-058-6/+67
* x86-64: Always display suffix for %LQ in 64bitH.J. Lu2020-10-055-4/+13
* x86: Clear modrm if not neededH.J. Lu2020-10-054-0/+14
* GAS: Update the .section directive so that a numeric section index can be pro...Nick Clifton2020-10-059-33/+86
* x86: Update register operand check for AddrPrefixOpRegH.J. Lu2020-10-0319-60/+196
* arm: add support for Cortex-A78 and Cortex-A78AEPrzemyslaw Wirkus2020-10-025-0/+22
* Fix the mve-vcvtne-it assembler test for the arm-*-pe targets.Nick Clifton2020-10-022-1/+7
* Add new directive to GAS: .attach_to_group.Nick Clifton2020-10-0111-1/+108
* x86: Check register operand for AddrPrefixOpRegH.J. Lu2020-09-308-34/+114
* [GAS][AArch64] Add support for Cortex-A78 and Cortex-A78AEPrzemyslaw Wirkus2020-09-304-0/+24
* NEWS: Mention recent Arm CPU supportAlex Coplan2020-09-302-0/+9
* aarch64: Add support for Neoverse N2 CPUAlex Coplan2020-09-303-0/+16
* gcc-4.4.7 warning fixesAlan Modra2020-09-303-3/+10
* Add a note about recent changes to the AArch64 assembler: TRBE, ETE and ETMv4...Przemyslaw Wirkus2020-09-292-0/+15
* This patch adds support for Cortex-X1 for ARM.Przemyslaw Wirkus2020-09-284-0/+16
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