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* Update year range in copyright notice of binutils filesAlan Modra2022-01-02575-579/+579
* ubsan: next_char_of_string signed integer overflowAlan Modra2022-01-011-2/+2
* ubsan: signed integer multiply overflowAlan Modra2022-01-011-1/+6
* gas reloc sortingAlan Modra2021-12-284-42/+30
* RISC-V: Rewrite the csr testcases.Nelson Chu2021-12-2442-1521/+3567
* RISC-V: Hypervisor ext: support Privileged Spec 1.12Vineet Gupta2021-12-245-5/+313
* RISC-V: Hypervisor ext: drop Privileged Spec 1.9.1 implementation/testsVineet Gupta2021-12-249-90/+0
* RISC-V: Update Scalar Crypto testcases.jiawei2021-12-2218-144/+144
* x86: -mfence-as-lock-add=yes doesn't work for 16-bit modeJan Beulich2021-12-211-1/+6
* gas/ELF: avoid below-base ref in obj_elf_parse_section_letters()Jan Beulich2021-12-211-13/+11
* x86: Terminate mnemonicendp in swap_operand()Vladimir Mezentsev2021-12-178-420/+420
* Fix AVR assembler so that it creates relocs that will work with linker relaxa...Nick Clifton2021-12-167-6/+45
* arm: Add support for Armv9.1-A to Armv9.3-ARichard Sandiford2021-12-1611-3/+94
* arm: Add support for Armv8.7-A and Armv8.8-ARichard Sandiford2021-12-169-1/+65
* aarch64: Add support for Armv9.1-A to Armv9.3-ARichard Sandiford2021-12-1618-2/+95
* RISC-V: Support svinval extension with frozen version 1.0.Nelson Chu2021-12-162-0/+20
* loongarch64 build failure on 32-bit hostAlan Modra2021-12-151-6/+6
* RISC-V: Clarify the behavior of .option arch directive.Nelson Chu2021-12-098-9/+13
* aarch64: Update gas/NEWS for recent changesRichard Sandiford2021-12-021-1/+4
* aarch64: Add BC instructionRichard Sandiford2021-12-027-0/+90
* aarch64: Enforce P/M/E order for MOPS instructionsRichard Sandiford2021-12-024-10/+202
* aarch64: Add support for +mopsRichard Sandiford2021-12-027-0/+1592
* aarch64: Add Armv8.8-A system registersRichard Sandiford2021-12-025-0/+46
* aarch64: Add id_aa64isar2_el1Richard Sandiford2021-12-025-0/+8
* aarch64: Add support for Armv8.8-ARichard Sandiford2021-12-024-2/+10
* aarch64: Provide line info for unclosed sequencesRichard Sandiford2021-12-025-15/+17
* aarch64: Add maximum immediate value to aarch64_sys_regRichard Sandiford2021-12-029-39/+66
* gas: re-generate configureSimon Marchi2021-12-021-2/+1
* gas: merge doc subdir up a levelMike Frysinger2021-12-016-1163/+671
* aarch64: Add missing system registers [PR27145]Richard Sandiford2021-11-3010-6/+877
* aarch64: Make LOR registers conditional on +lorRichard Sandiford2021-11-304-1/+13
* aarch64: Remove ZIDR_EL1Richard Sandiford2021-11-303-7/+0
* aarch64: Allow writes to MFAR_EL3Richard Sandiford2021-11-305-20/+13
* aarch64: Mark PMSIDR_EL1 as read-onlyRichard Sandiford2021-11-305-3/+8
* aarch64: Remove duplicate system register entriesRichard Sandiford2021-11-302-4/+0
* aarch64: Check for register aliases before mnemonicsRichard Sandiford2021-11-306-34/+38
* RISC-V: The vtype immediate with more than the defined 8 bits are preserved.Nelson Chu2021-11-302-0/+13
* RISC-V: Dump vset[i]vli immediate as numbers once vsew or vlmul is reserved.Nelson Chu2021-11-302-68/+28
* PR28629 NIOS2 falloutAlan Modra2021-11-291-1/+1
* gas: Update commit 4780e5e4933H.J. Lu2021-11-262-2/+2
* [gas] Fix file 0 dir with -gdwarf-5Tom de Vries2021-11-263-3/+16
* gas: enable silent build rulesMike Frysinger2021-11-252-2/+42
* Update bug reporting addressAlan Modra2021-11-232-6/+2
* RISC-V: Replace .option rvc/norvc with .option arch, +c/-c.Nelson Chu2021-11-2216-18/+22
* RISC-V: Support new .option arch directive.Nelson Chu2021-11-1912-18/+134
* Re: Add multibyte character warning option to the assembler.Alan Modra2021-11-191-10/+10
* RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC.Nelson Chu2021-11-196-0/+101
* Add multibyte character warning option to the assembler.Nick Clifton2021-11-1814-10/+205
* RISC-V: Add testcases for z[fdq]inxjiawei2021-11-186-0/+222
* RISC-V: Add instructions and operand set for z[fdq]inxjiawei2021-11-181-1/+3
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