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* gas: fold symbol table entries generated for .startof.() / .sizeof.()Jan Beulich2021-06-185-8/+71
* Fix an assertion failure in the AArch64 assembler triggered by incorrect inst...Nick Clifton2021-06-175-3/+24
* gas: handle csect in bss section for XCOFFClément Chigot2021-06-172-3/+14
* gas: ensure sections contents is zero for BFD_RELOC_PPC*_TLSM on XCOFF.Clément Chigot2021-06-176-5/+107
* gas: fix hex float parsing from .dcb.? directivesJan Beulich2021-06-163-71/+75
* gas: fix overflow diagnosticsJan Beulich2021-06-166-10/+72
* x86: bring "gas --help" output for --32 etc in sync with realityJan Beulich2021-06-153-4/+15
* x86: simplify .dispNN settingJan Beulich2021-06-152-51/+24
* x86: slightly simplify offset_in_range()Jan Beulich2021-06-152-2/+7
* x86: harmonize disp with imm handlingJan Beulich2021-06-155-23/+79
* x86: make offset_in_range()'s warning contents useful (again)Jan Beulich2021-06-152-6/+7
* x86: off-by-1 in offset_in_range()Jan Beulich2021-06-157-1/+89
* x86: permit parenthesized expressions again as addressing scale factorJan Beulich2021-06-155-2/+26
* gas: fold three as_warn() in emit_expr_with_reloc()Jan Beulich2021-06-142-12/+6
* gas: drop TC_ADDRESS_BYTES conditionalsJan Beulich2021-06-143-5/+8
* x86: Always define TC_PARSE_CONS_EXPRESSIONH.J. Lu2021-06-113-3/+12
* RISC-V: Update the riscv_opts.[rvc|rve] in the riscv_set_arch.Nelson Chu2021-06-112-10/+14
* arm: avoid "shadowing" of glibc function nameJan Beulich2021-06-102-16/+24
* arm: fix array-out-of-bounds upon register parsing errorJan Beulich2021-06-102-1/+6
* x86: suppress LEA optimization in a specific 16-bit caseJan Beulich2021-06-105-3/+69
* x86: cover a.out in recently added testsJan Beulich2021-06-084-41/+47
* x86: minor improvements to optimize_imm() (part II)Jan Beulich2021-06-082-3/+7
* x86: minor improvements to optimize_disp() (part II)Jan Beulich2021-06-082-7/+10
* x86-64: avoid bogus warnings with 32-bit addressingJan Beulich2021-06-089-0/+89
* x86: minor improvements to optimize_disp() (part I)Jan Beulich2021-06-082-11/+18
* x86: honor quoted figure braces in i386_att_operand()Jan Beulich2021-06-074-8/+43
* x86: better respect quotes in parse_operands()Jan Beulich2021-06-074-14/+40
* x86: allow unary operators to start a memory operandJan Beulich2021-06-075-14/+40
* x86: make symbol quotation check consistent in i386_att_operand()Jan Beulich2021-06-075-7/+44
* x86: correct absolute branch check with segment overrideJan Beulich2021-06-072-9/+14
* x86/Intel: drop unnecessary bracket matching from parse_operands()Jan Beulich2021-06-072-13/+8
* x86: remove pointless 2nd parameter from check_VecOperations()Jan Beulich2021-06-073-6/+11
* x86: immediate operands don't allow for vector operationsJan Beulich2021-06-072-10/+4
* ix86: wrap constantsJan Beulich2021-06-076-6/+165
* PR1202, mcore disassembler: wrong address looptAlan Modra2021-06-032-1/+6
* PowerPC table driven -Mraw disassemblyAlan Modra2021-05-294-0/+121
* MIPS/GAS/testsuite: Add C0, C1, C2, C3 opcode testsMaciej W. Rozycki2021-05-2954-0/+7580
* MIPS/GAS/testsuite: Run RFE test across all ISAsMaciej W. Rozycki2021-05-298-7/+39
* MIPS/GAS/testsuite: Run coprocessor tests across all ISAsMaciej W. Rozycki2021-05-2996-467/+1646
* MIPS/opcodes: Accurately record coprocessor opcode CPU/ISA membershipMaciej W. Rozycki2021-05-293-2/+53
* MIPS/GAS/testsuite: Add tests for coprocessor branch instructionsMaciej W. Rozycki2021-05-2916-0/+215
* MIPS/opcodes: Disassemble the RFE instructionMaciej W. Rozycki2021-05-294-0/+26
* MIPS/opcodes: Add legacy CP1 control register namesMaciej W. Rozycki2021-05-299-29/+47
* MIPS/GAS/testsuite: Add tests for coprocessor access instructionsMaciej W. Rozycki2021-05-2927-0/+2180
* MIPS/opcodes: Do not use CP0 register names for control registersMaciej W. Rozycki2021-05-292-4/+11
* MIPS/opcodes: Add TX39 CP0 register namesMaciej W. Rozycki2021-05-293-0/+49
* microMIPS/opcodes: Refer FPRs rather than FCRs with DMTC1Maciej W. Rozycki2021-05-297-321/+331
* MIPS/GAS: Use FCSR rather than RA with CFC1/CTC1Maciej W. Rozycki2021-05-292-4/+11
* x86: Restore PC16 relocation overflow checkH.J. Lu2021-05-284-47/+27
* PowerPC: Add new xxmr and xxlnot extended mnemonicsPeter Bergner2021-05-273-0/+13
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